Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752208AbbHMIhn (ORCPT ); Thu, 13 Aug 2015 04:37:43 -0400 Received: from smtprelay.synopsys.com ([198.182.60.111]:44918 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750908AbbHMIhk convert rfc822-to-8bit (ORCPT ); Thu, 13 Aug 2015 04:37:40 -0400 From: John Youn To: "balbi@ti.com" , Yunzhi Li CC: "jwerner@chromium.org" , "dianders@chromium.org" , "huangtao@rock-chips.com" , "cf@rock-chips.com" , "hl@rock-chips.com" , "linux-rockchip@lists.infradead.org" , John Youn , Greg Kroah-Hartman , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v1] usb: dwc2: reset AHB hclk domain before init Thread-Topic: [PATCH v1] usb: dwc2: reset AHB hclk domain before init Thread-Index: AQHQ091zIEXDk/kf9UGai6j1T4lPNQ== Date: Thu, 13 Aug 2015 08:37:36 +0000 Message-ID: <2B3535C5ECE8B5419E3ECBE300772909017528D354@US01WEMBX2.internal.synopsys.com> References: <1439260062-12049-1-git-send-email-lyz@rock-chips.com> <20150811141229.GB13920@saruman.tx.rr.com> <55CB28A1.6090208@rock-chips.com> <20150812193244.GA20972@saruman.tx.rr.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.12.64.103] Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2631 Lines: 74 On 8/12/2015 12:33 PM, Felipe Balbi wrote: > On Wed, Aug 12, 2015 at 07:06:09PM +0800, Yunzhi Li wrote: >> Hi , >> 在 2015/8/11 22:12, Felipe Balbi 写道: >>> Hi, >>> >>> On Tue, Aug 11, 2015 at 10:27:42AM +0800, Yunzhi Li wrote: >>>> We initiate dwc2 usb controller in BIOS, when kernel driver >>>> start-up we should reset AHB hclk domain to reset all AHB >>>> interface registers to default. Without this the FIFO value >>>> setting might be incorrect because calculating FIFO size need the >>>> power-on value of GRXFSIZ/GNPTXFSIZ/HPTXFSIZ registers. >>>> >>>> This patch could avoid warnning massage like in rk3288 platform: >>>> [ 2.074764] dwc2 ff580000.usb: 256 invalid for >>>> host_perio_tx_fifo_size. Check HW configuration. >>>> >>>> Signed-off-by: Yunzhi Li >>>> >>>> --- >>>> >>>> drivers/usb/dwc2/platform.c | 12 ++++++++++++ >>>> 1 file changed, 12 insertions(+) >>>> >>>> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c >>>> index 9093530..3da21ab 100644 >>>> --- a/drivers/usb/dwc2/platform.c >>>> +++ b/drivers/usb/dwc2/platform.c >>>> @@ -42,6 +42,7 @@ >>>> #include >>>> #include >>>> #include >>>> +#include >>>> #include >>>> @@ -165,6 +166,7 @@ static int dwc2_driver_probe(struct platform_device *dev) >>>> struct resource *res; >>>> struct phy *phy; >>>> struct usb_phy *uphy; >>>> + struct reset_control *rst; >>>> int retval; >>>> int irq; >>>> @@ -189,6 +191,16 @@ static int dwc2_driver_probe(struct platform_device *dev) >>>> hsotg->dev = &dev->dev; >>>> + /* AHB hclk domain reset, set all AHB interface registers to default */ >>>> + rst = devm_reset_control_get_optional(&dev->dev, "ahb_reset"); >>> why isn't this done in core so PCI systems can also make use of it ? >>> >> I have no ides about how to reset a PCI interface dwc2 controller, John >> could you please give some infomation about it ? >> Is it also needed for PCI interface dwc2 IP ? > > even on platform only, how do you know all users provide a ahb_reset > reset controller ? > Also where do you provide the ahb_reset? I don't see it as a property for dwc2. With regards to PCI, I'm also not sure how you'd accomplish something like this. But the platform I use at least doesn't need this. Regards, John -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/