Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932369AbbHND71 (ORCPT ); Thu, 13 Aug 2015 23:59:27 -0400 Received: from bedivere.hansenpartnership.com ([66.63.167.143]:57954 "EHLO bedivere.hansenpartnership.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753347AbbHND7Y (ORCPT ); Thu, 13 Aug 2015 23:59:24 -0400 Message-ID: <1439524760.8421.23.camel@HansenPartnership.com> Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries From: James Bottomley To: Dan Williams Cc: Christoph Hellwig , Linus Torvalds , linux-mips , "linux-ia64@vger.kernel.org" , "linux-nvdimm@lists.01.org" , David Howells , sparclinux@vger.kernel.org, Hans-Christian Egtvedt , "linux-arch@vger.kernel.org" , linux-s390 , the arch/x86 maintainers , David Woodhouse , =?ISO-8859-1?Q?H=E5vard?= Skinnemoen , linux-xtensa@linux-xtensa.org, grundler@parisc-linux.org, Miao Steven , Alex Williamson , linux-metag@vger.kernel.org, Jens Axboe , Michal Simek , Parisc List , Vineet Gupta , Linux Kernel Mailing List , linux-alpha@vger.kernel.org, Linux Media Mailing List , ppc-dev Date: Thu, 13 Aug 2015 20:59:20 -0700 In-Reply-To: References: <1439363150-8661-1-git-send-email-hch@lst.de> <1439363150-8661-30-git-send-email-hch@lst.de> <20150813143150.GA17183@lst.de> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.11 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1754 Lines: 37 On Thu, 2015-08-13 at 20:30 -0700, Dan Williams wrote: > On Thu, Aug 13, 2015 at 7:31 AM, Christoph Hellwig wrote: > > On Wed, Aug 12, 2015 at 09:01:02AM -0700, Linus Torvalds wrote: > >> I'm assuming that anybody who wants to use the page-less > >> scatter-gather lists always does so on memory that isn't actually > >> virtually mapped at all, or only does so on sane architectures that > >> are cache coherent at a physical level, but I'd like that assumption > >> *documented* somewhere. > > > > It's temporarily mapped by kmap-like helpers. That code isn't in > > this series. The most recent version of it is here: > > > > https://git.kernel.org/cgit/linux/kernel/git/djbw/nvdimm.git/commit/?h=pfn&id=de8237c99fdb4352be2193f3a7610e902b9bb2f0 > > > > note that it's not doing the cache flushing it would have to do yet, but > > it's also only enabled for x86 at the moment. > > For virtually tagged caches I assume we would temporarily map with > kmap_atomic_pfn_t(), similar to how drm_clflush_pages() implements > powerpc support. However with DAX we could end up with multiple > virtual aliases for a page-less pfn. At least on some PA architectures, you have to be very careful. Improperly managed, multiple aliases will cause the system to crash (actually a machine check in the cache chequerboard). For the most temperamental systems, we need the cache line flushed and the alias mapping ejected from the TLB cache before we access the same page at an inequivalent alias. James -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/