Subject: Re: [PATCH v4 1/2] Documentation: dt: Add Xilinx zynqmp dma device
 tree binding documentation
To: Vinod Koul <vinod.koul@intel.com>,
        punnaiah choudary kalluri <punnaia@xilinx.com>
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CC: Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "pawel.moll@arm.com" <pawel.moll@arm.com>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
        "ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>,
        "michal.simek@xilinx.com" <michal.simek@xilinx.com>,
        <dan.j.williams@intel.com>, <dmaengine@vger.kernel.org>,
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        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Punnaiah Choudary <kpc528@gmail.com>
From: Michal Simek <michal.simek@xilinx.com>
Message-ID: <55D571AA.1090102@xilinx.com>
Date: Thu, 20 Aug 2015 08:20:26 +0200
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On 08/20/2015 08:18 AM, Vinod Koul wrote:
> On Thu, Aug 20, 2015 at 11:41:33AM +0530, punnaiah choudary kalluri wrote:
>>>> +- interrupts: Should contain DMA channel interrupt
>>> channel interrupt or interrupts, former says it is plural
>>
>> ZynqMP DMA has single interrupt for each channel So, that is the reason
>> i have explicitly mentioned it as interrupt ( not interrupts).
>>
>> Please let me know if you still want it to be plural.
> 
> The example had multiple values so plural sounds right
> 

I expect you are talking about this "interrupts = <0 117 4>;"

It is 3 cells format used on ARM based on gic spec which is on SPI
interrupt 117 active high level-sensitive

Documentation/devicetree/bindings/arm/gic.txt

Thanks,
Michal

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