Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751831AbbHTJmY (ORCPT ); Thu, 20 Aug 2015 05:42:24 -0400 Received: from mail-out.m-online.net ([212.18.0.10]:50689 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751302AbbHTJmW (ORCPT ); Thu, 20 Aug 2015 05:42:22 -0400 X-Auth-Info: CusDZuXacttUY47M3dCVlW5XB2hoJ2dAfsSV86n3Lsg= From: Marek Vasut To: Viet Nga Dao Subject: Re: [PATCH] [PATCH v5] mtd:spi-nor: Add Altera Quad SPI Driver Date: Thu, 20 Aug 2015 11:42:18 +0200 User-Agent: KMail/1.13.7 (Linux/3.14-2-amd64; KDE/4.13.1; x86_64; ; ) Cc: "linux-mtd@lists.infradead.org" , Brian Norris , David Woodhouse , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "nga_chi86" References: <1440053705-3836-1-git-send-email-vndao@altera.com> <201508201052.47502.marex@denx.de> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201508201142.18586.marex@denx.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1679 Lines: 48 On Thursday, August 20, 2015 at 11:18:14 AM, Viet Nga Dao wrote: Hi, [...] > >> That is why we decided to upstream the > >> driver. If the hardware fix, there might not need to have any changes > >> in driver to support or if yes, it will be just minor. > > > > If the hardware can do proper READID opcode, this entire nonsense table > > will go away and a proper integration into the SPI NOR framework will > > take place. > > > > You might consider submitting this driver for staging, but I definitely > > am not a big fan of that. > > You might misunderstand the hardware problem i mention here. This soft > IP controller is able to provide the ID for our Altera EPCS/EPCQ flash > chips, which are non JEDEC chips. As from EPCQ device data sheet > (https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature > /hb/cfg/cfg_cf52012.pdf), the device ID is 8 bit data. So what exactly is the output of READID instruction followed by 6 Byte read on an EPCQ chip? > The remaining > problem here is that this controller is able to support Micron chips but > it currently has > limitation in providing only 8 bit ID, which is not full JEDEC ID for > Micron chips. OK > Hence, we are asking hardware engineer to find out the > solution so that the driver does not need to do any dirty hacking. And > so, this table should still be here even hardware fix will take place > or not. [...] Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/