Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932140AbbHXC31 (ORCPT ); Sun, 23 Aug 2015 22:29:27 -0400 Received: from smtprelay0150.hostedemail.com ([216.40.44.150]:35299 "EHLO smtprelay.hostedemail.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753416AbbHXC3Z (ORCPT ); Sun, 23 Aug 2015 22:29:25 -0400 X-Session-Marker: 6A6F6540706572636865732E636F6D X-Spam-Summary: 2,0,0,,d41d8cd98f00b204,joe@perches.com,:::::::::::::::::::::::::::::::::::::::::::::::::::,RULES_HIT:41:355:379:541:599:960:973:988:989:1260:1277:1311:1313:1314:1345:1359:1373:1437:1515:1516:1518:1534:1541:1593:1594:1711:1730:1747:1777:1792:2393:2559:2562:2828:3138:3139:3140:3141:3142:3352:3622:3865:3866:3867:3868:3871:3873:4321:5007:6119:6261:6742:6743:8957:10004:10400:10848:11026:11232:11658:11914:12043:12438:12517:12519:12679:12740:13069:13311:13357:21080:21088,0,RBL:none,CacheIP:none,Bayesian:0.5,0.5,0.5,Netcheck:none,DomainCache:0,MSF:not bulk,SPF:fn,MSBL:0,DNSBL:none,Custom_rules:0:0:0 X-HE-Tag: tramp36_3475708672b32 X-Filterd-Recvd-Size: 2835 Message-ID: <1440383359.2670.15.camel@perches.com> Subject: Re: [PATCH 1/3] ARM: uniphier: add outer cache support From: Joe Perches To: Masahiro Yamada Cc: arm@kernel.org, Arnd Bergmann , Jiri Slaby , Linus Walleij , Kumar Gala , Jungseung Lee , Ian Campbell , Rob Herring , Tejun Heo , Pawel Moll , Florian Fainelli , Maxime Coquelin , Andrew Morton , devicetree@vger.kernel.org, Mauro Carvalho Chehab , Russell King , linux-arm-kernel@lists.infradead.org, Nathan Lynch , Kees Cook , Paul Bolle , Greg KH , linux-kernel@vger.kernel.org, "David S. Miller" , Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= , Mark Rutland Date: Sun, 23 Aug 2015 19:29:19 -0700 In-Reply-To: <1440382692-3855-2-git-send-email-yamada.masahiro@socionext.com> References: <1440382692-3855-1-git-send-email-yamada.masahiro@socionext.com> <1440382692-3855-2-git-send-email-yamada.masahiro@socionext.com> Content-Type: text/plain; charset="ISO-8859-1" X-Mailer: Evolution 3.12.11-0ubuntu3 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1236 Lines: 41 On Mon, 2015-08-24 at 11:18 +0900, Masahiro Yamada wrote: > This commit adds support for UniPhier outer cache controller. > All the UniPhier SoCs are equipped with the L2 cache, while the L3 > cache is currently only integrated on PH1-Pro5 SoC. style trivia: You might add and use #define pr_fmt(fmt) "uniphier: " fmt before any other #include so all of the pr_ uses are automatically prefixed. > diff --git a/arch/arm/mm/cache-uniphier.c b/arch/arm/mm/cache-uniphier.c [] > +static int __init __uniphier_cache_init(void) > +{ [] > + if (uniphier_outer_levels == 0) { > + ret = ret ?: -ENODEV; > + pr_err("uniphier: failed to initialize outer cache\n"); So this becomes: pr_err("failed to initialize outer cache\n"); > +int __init uniphier_cache_init(void) > +{ [] > + pr_info("uniphier: enabled outer cache (%s)\n", > + uniphier_outer_levels >= 2 ? "L2 and L3" : "L2"); pr_info("enabled outer cache (%s)\n", uniphier_outer_levels >= 2 ? "L2 and L3" : "L2"); etc... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/