Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754069AbbHXIOM (ORCPT ); Mon, 24 Aug 2015 04:14:12 -0400 Received: from lucky1.263xmail.com ([211.157.147.132]:48156 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753804AbbHXIOK (ORCPT ); Mon, 24 Aug 2015 04:14:10 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <4847911dffa590e8a8a7028804517c16> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Shawn Lin To: Heiko Stuebner , Stephen Boyd , Michael Turquette Cc: linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shawn Lin Subject: [PATCH] clk: rockchip: disable init state before mmc card initialization Date: Mon, 24 Aug 2015 16:12:26 +0800 Message-Id: <1440403946-13266-1-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 1.8.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2434 Lines: 68 mmc host controller's IO input/output timing is unpredictable if bootloader execute tuning for HS200 mode. It might make kernel failed to initialize mmc card in identification mode. The root cause is tuning phase and degree setting for HS200 mode in bootloader aren't applicable to that of identification mode in kernel stage. Anyway, we can't force all bootloaders to disable tuning phase and degree setting before into kernel. Simply disable it in rockchip_clk_register_mmc. Signed-off-by: Shawn Lin --- drivers/clk/rockchip/clk-mmc-phase.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index e9f8df32..02b6f3d 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -38,6 +38,9 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw, #define ROCKCHIP_MMC_DEGREE_MASK 0x3 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET) +#define ROCKCHIP_MMC_INIT_STATE_DISABLE (0x1) +#define ROCKCHIP_MMC_INIT_STATE_SHIFT (0) +#define ROCKCHIP_MMC_INIT_STATE_MASK (0x1) #define PSECS_PER_SEC 1000000000000LL @@ -119,6 +122,21 @@ static const struct clk_ops rockchip_mmc_clk_ops = { .set_phase = rockchip_mmc_set_phase, }; +static void rockchip_clk_mmc_disable_init(struct rockchip_mmc_clock *mmc_clock) +{ + if (mmc_clock->shift != ROCKCHIP_MMC_INIT_STATE_SHIFT) + return; + + writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_DISABLE, + ROCKCHIP_MMC_INIT_STATE_MASK, + mmc_clock->shift), + mmc_clock->reg); + + pr_debug("%s: clear mmc init state to %d", __func__, + (readl(mmc_clock->reg) >> (mmc_clock->shift)) & + ROCKCHIP_MMC_INIT_STATE_MASK); +} + struct clk *rockchip_clk_register_mmc(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *reg, int shift) @@ -139,6 +157,8 @@ struct clk *rockchip_clk_register_mmc(const char *name, mmc_clock->reg = reg; mmc_clock->shift = shift; + rockchip_clk_mmc_disable_init(mmc_clock); + if (name) init.name = name; -- 2.3.7 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/