From: Shenwei Wang <Shenwei.Wang@freescale.com>
To: Thomas Gleixner <tglx@linutronix.de>
CC: "shawn.guo@linaro.org" <shawn.guo@linaro.org>,
        "jason@lakedaemon.net" <jason@lakedaemon.net>,
        "sudeep.holla@arm.com" <sudeep.holla@arm.com>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Huang Anson <Anson.Huang@freescale.com>
Subject: RE: [PATCH v2 1/1] irqchip: imx-gpcv2: Simplify the implementation
Thread-Topic: [PATCH v2 1/1] irqchip: imx-gpcv2: Simplify the implementation
Thread-Index: AQHQ4cVtVRGXhbefBEOg3W7o0CfV3p4hx3Lw
Date: Fri, 28 Aug 2015 19:23:18 +0000
Message-ID: <CY1PR0301MB08439B2D50D3A2C0EC80D579836E0@CY1PR0301MB0843.namprd03.prod.outlook.com>
References: <1440617755-2942-1-git-send-email-shenwei.wang@freescale.com>
 <alpine.DEB.2.11.1508282110260.15006@nanos>
In-Reply-To: <alpine.DEB.2.11.1508282110260.15006@nanos>
Accept-Language: zh-CN, en-US
Content-Language: en-US
Content-Type: text/plain; charset="gb2312"
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Aug 2015 19:23:18.5084
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR03MB1369
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Transfer-Encoding: 8bit
X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id t7SJNUmL008193
Content-Length: 1402
Lines: 47


> -----Original Message-----
> From: Thomas Gleixner [mailto:tglx@linutronix.de]
> Sent: 2015??8??28?? 14:11
> To: Wang Shenwei-B38339
> Cc: shawn.guo@linaro.org; jason@lakedaemon.net; sudeep.holla@arm.com;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Huang
> Yongcai-B20788
> Subject: Re: [PATCH v2 1/1] irqchip: imx-gpcv2: Simplify the implementation
> 
> On Wed, 26 Aug 2015, Shenwei Wang wrote:
> >  u32 imx_gpcv2_get_wakeup_source(u32 **sources)  {
> > -	if (!imx_gpcv2_instance)
> > +	struct gpcv2_irqchip_data *cd;
> > +	void __iomem *reg;
> > +	int i;
> > +
> > +	cd = imx_gpcv2_instance;
> > +	if (!cd)
> >  		return 0;
> >
> > +	for (i = 0; i < IMR_NUM; i++) {
> > +		reg = cd->gpc_base + cd->cpu2wakeup + i * 4;
> > +		cd->wakeup_sources[i] = readl_relaxed(reg);
> > +	}
> > +
> >  	if (sources)
> > -		*sources = imx_gpcv2_instance->wakeup_sources;
> > +		*sources = cd->wakeup_sources;
> >
> >  	return IMR_NUM;
> >  }
> 
> So once again. As you said before nothing is going to use the case where source
> == NULL, can we please get rid of it?

It will be used to allocate the memory for the predefined values of interrupts for each power
Domain. Can we keep it?

Thanks,
Shenwei

> Thanks,
> 
> 	tglx
????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m????????????I?