From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
To: "broonie@kernel.org" <broonie@kernel.org>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "mporter@linaro.org" <mporter@linaro.org>,
        "gnurou@gmail.com" <gnurou@gmail.com>,
        "rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
        "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
        "ttynkkynen@nvidia.com" <ttynkkynen@nvidia.com>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        "khilman@linaro.org" <khilman@linaro.org>,
        "ulf.hansson@linaro.org" <ulf.hansson@linaro.org>,
        "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
        "swarren@wwwdotorg.org" <swarren@wwwdotorg.org>,
        "linux@arm.linux.org.uk" <linux@arm.linux.org.uk>
Subject: Re: [PATCH] arm: tegra: update default configuration
Thread-Topic: [PATCH] arm: tegra: update default configuration
Thread-Index: AQHQ4VQ4UIcgrktcTEiSygPC+LGogZ4hoOwAgAA9MoA=
Date: Fri, 28 Aug 2015 20:30:35 +0000
Message-ID: <1440793833.2795.57.camel@toradex.com>
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On Fri, 2015-08-28 at 16:51 +0000, Mark Brown wrote:

> Please fix your mailer to word wrap within paragraphs so that your
> mails
> are legible.

Sure, sorry. At times I forget that Android isn't sane in that respect
and can't be used to send mailing list compliant emails.

> > On 27 Aug 2015 16:55, Mark Brown <broonie@kernel.org> wrote:
> 
> > > Does the system really have the wm9712 wired up as a battery
> > > monitor?
> 
> > Well, remember we are talking about a system on module. Those
> > WM9712
> > pins all go to the 200 pin SODIMM edge connector and I know that
> > certain customers indeed have carrier boards that use it that way.
> > If
> > there is any opposition and considering this being rather optional
> > I
> > may also drop this one but audio/touch is definitely a standard
> > feature available on all or carrier boards.
> 
> Does that actually work with mainline?  The driver requires platform
> data to do anything useful (there's no DT bindings for it) and I
> can't
> see anything providing that on Tegra systems.

To be honest I have not really tried it resp. I did actually notice it
bailing out but haven't had time to look closer into it yet. We are
using it with NVIDIA's still platform data based downstream L4T R16.5
and I do know that it works there so I just kind of assumed there will
be a way to make it work in mainline as well. However rather than
adding such platform data I guess migrating it to DT would make more
sense. But until such a migration has been completed I guess we rather
just drop enabling it for now and I will send out a v2 in that respect.????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m????????????I?