Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752885AbbHaMEb (ORCPT ); Mon, 31 Aug 2015 08:04:31 -0400 Received: from mail-la0-f50.google.com ([209.85.215.50]:34087 "EHLO mail-la0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752507AbbHaME3 (ORCPT ); Mon, 31 Aug 2015 08:04:29 -0400 Message-ID: <55E442C7.7060509@linaro.org> Date: Mon, 31 Aug 2015 14:04:23 +0200 From: Tomasz Nowicki User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Firefox/31.0 Thunderbird/31.8.0 MIME-Version: 1.0 To: Bjorn Helgaas CC: Hanjun Guo , Arnd Bergmann , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Jiang Liu , Liviu Dudau , Thomas Gleixner , Yijing Wang , Lorenzo Pieralisi , Suravee Suthikulpanit , Mark Salter , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org Subject: Re: [PATCH 02/11] x86, pci: Clean up comment about buggy MMIO config space access for AMD Fam10h CPUs. References: <1432644564-24746-1-git-send-email-hanjun.guo@linaro.org> <1432644564-24746-3-git-send-email-hanjun.guo@linaro.org> In-Reply-To: <1432644564-24746-3-git-send-email-hanjun.guo@linaro.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1809 Lines: 48 On 26.05.2015 14:49, Hanjun Guo wrote: > From: Tomasz Nowicki > > - fix typo > - improve explanation > - add reference to the related document > > Signed-off-by: Tomasz Nowicki > Signed-off-by: Hanjun Guo > Tested-by: Suravee Suthikulpanit > --- > arch/x86/include/asm/pci_x86.h | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h > index 164e3f8..eddf8f0 100644 > --- a/arch/x86/include/asm/pci_x86.h > +++ b/arch/x86/include/asm/pci_x86.h > @@ -154,10 +154,13 @@ extern struct list_head pci_mmcfg_list; > > /* > * AMD Fam10h CPUs are buggy, and cannot access MMIO config space > - * on their northbrige except through the * %eax register. As such, you MUST > - * NOT use normal IOMEM accesses, you need to only use the magic mmio-config > + * on their northbridge except through the * %eax register. As such, you MUST > + * NOT use normal IOMEM accesses, you need to only use the magic mmio_config_* > * accessor functions. > - * In fact just use pci_config_*, nothing else please. > + * > + * Please refer to the following doc: > + * "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors", > + * rev. 3.48, sec 2.11.1, "MMIO Configuration Coding Requirements". > */ > static inline unsigned char mmio_config_readb(void __iomem *pos) > { > Hi Bjorn, Can you please consider to pick up this one patch? Regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/