Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752911AbbKCMA2 (ORCPT ); Tue, 3 Nov 2015 07:00:28 -0500 Received: from regular2.263xmail.com ([211.157.152.4]:56388 "EHLO regular2.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751230AbbKCMA1 (ORCPT ); Tue, 3 Nov 2015 07:00:27 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: huangtao@rock-chips.com X-FST-TO: huangtao@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: huangtao@rock-chips.com X-UNIQUE-TAG: <44dadc5677d997a4e7838ab9f41aacbd> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [RESEND PATCH 0/1] Fix the "hard LOCKUP" when running a heavy loading To: Russell King - ARM Linux References: <1446538209-13490-1-git-send-email-wxt@rock-chips.com> <20151103111437.GU8644@n2100.arm.linux.org.uk> Cc: Caesar Wang , Thomas Petazzoni , Heiko Stuebner , Ard Biesheuvel , sjg@chromium.org, Stephen Boyd , dianders@chromium.org, linux-kernel@vger.kernel.org, Nadav Haklai , linux-rockchip@lists.infradead.org, cwz@rock-chips.com, Jonathan Stone , Gregory CLEMENT , linux-arm-kernel@lists.infradead.org, hl@rock-chips.com From: "Huang, Tao" Message-ID: <5638A1C6.30200@rock-chips.com> Date: Tue, 3 Nov 2015 20:00:06 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <20151103111437.GU8644@n2100.arm.linux.org.uk> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1884 Lines: 44 Hello Russell: 在 2015年11月03日 19:14, Russell King - ARM Linux 写道: > On Tue, Nov 03, 2015 at 04:10:08PM +0800, Caesar Wang wrote: >> As the Russell said: >> "in other words, which can be handled by updating a control register in >> the firmware or boot loader" >> Maybe the better solution is in firmware. > > The full quote is: > > "I think we're at the point where we start insisting that workarounds > which are simple enable/disable feature bit operations (in other words, > which can be handled by updating a control register in the firmware or > boot loader) must be done that way, and we are not going to add such > workarounds to the kernel anymore." > > The position hasn't changed. Workarounds such as this should be handled > in the firmware/boot loader before control is passed to the kernel. > > The reason is very simple: if the C compiler can generate code which > triggers the bug, it can generate code which triggers the bug in the > boot loader. So, the only place such workarounds can be done is before > any C code gets executed. Putting such workarounds in the kernel is > completely inappropriate. I agree with your reason for CPU0. But how about CPU1~3 if we don't use any firmware such as ARM Trusted Firmware to take control of CPU power on? If the CPU1~3 will run on Linux when its first instruction is running? BTW I don't want to argue with you the workaround is right or wrong because I know the errata just happen on r0p0 not r0p1. > > Sorry, I'm not going to accept this workaround into the kernel. It seems we should introduce some code outside the kernel to do such initialization? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/