Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id ; Sun, 23 Feb 2003 20:43:14 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id ; Sun, 23 Feb 2003 20:43:14 -0500 Received: from twinlark.arctic.org ([208.44.199.239]:6610 "EHLO twinlark.arctic.org") by vger.kernel.org with ESMTP id ; Sun, 23 Feb 2003 20:43:14 -0500 Date: Sun, 23 Feb 2003 17:53:25 -0800 (PST) From: dean gaudet To: Kenneth Johansson cc: Alan Cox , "Martin J. Bligh" , Xavier Bestel , Linux Kernel Mailing List Subject: Re: Minutes from Feb 21 LSE Call In-Reply-To: <1046050010.2840.14.camel@tiger> Message-ID: References: <20030223082036.GI10411@holomorphy.com> <1046031687.2140.32.camel@bip.localdomain.fake> <16920000.1046033458@[10.10.2.4]> <1046044629.2210.3.camel@irongate.swansea.linux.org.uk> <1046050010.2840.14.camel@tiger> X-comment: visit http://arctic.org/~dean/legal for information regarding copyright and disclaimer. MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 794 Lines: 21 On Sun, 24 Feb 2003, Kenneth Johansson wrote: > If you really do mean compressed cache I don't think anybody has done > that for real. people are doing this *for real* -- it really depends on what you define as compressed. ARM thumb is definitely a compression function for code. x86 native instructions are compressed compared to the RISC-like micro-ops which a processor like athlon, p3, and p4 actually execute. for similar operations, an x86 would average probably 1.5 bytes to encode what a 32-bit RISC would need 4 bytes to encode. -dean - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/