Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755449AbbKCQA7 (ORCPT ); Tue, 3 Nov 2015 11:00:59 -0500 Received: from mout.kundenserver.de ([212.227.126.130]:49322 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932425AbbKCQAz (ORCPT ); Tue, 3 Nov 2015 11:00:55 -0500 From: Arnd Bergmann To: Sinan Kaya Cc: Tomasz Nowicki , Lorenzo Pieralisi , bhelgaas@google.com, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, jiang.liu@linux.intel.com, robert.richter@caviumnetworks.com, Narinder.Dhillon@caviumnetworks.com, ddaney@caviumnetworks.com, Liviu.Dudau@arm.com, tglx@linutronix.de, wangyijing@huawei.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org Subject: Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI hostbridge init Date: Tue, 03 Nov 2015 16:59:28 +0100 Message-ID: <5802577.H74A3Lg5B3@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <5638CE5D.4030703@codeaurora.org> References: <1445963922-22711-1-git-send-email-tn@semihalf.com> <5638C728.2020503@semihalf.com> <5638CE5D.4030703@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:D+6I4zJ4eUDCKc3/g8oLJl8QhD8bNOG2/BVx+IpqMrcD4j1lq2k 86YpTecrLhjVC0K+Z2PvpMv0Ep6fTXGwstp5iXoaQUVkBsCNt+MxxSMGA/OaaZcQ2d5B9f5 KO6xycru6um51woRiBtpoV5QiC1G2k1HeaWSCwqGfFiuNtvtW6j3vsYL+xE/X9N2ehcXzTX 7P6l5qveEsNnrPTdtgHrw== X-UI-Out-Filterresults: notjunk:1;V01:K0:hL58Yxrsd0w=:csDo5fDGVW/wAiCNxQxp4J CnH5qDmQIZ6xo4BrXSXGqYcqxiGsFxKSR9XHNLRgDtfC9AnBlJpauGXZSgSfKAW7YmXwoJWD2 Ryq5Lkd753dR38FEUxYw4dsighpGNXVZbon3cGOQe78Kr7uibOqp/U6GnTrYefM14PQDCqLTR aev8XUuKmWjurLTvP7vL2IqtjT2xw6nFqV696r6+MuK+KQJh88VryUEDZHT1jOHUqtoOiN78b AadCB4Z3xODqwn9TID9U2vdY7spyQd5KkAGhsyvHxhUCFZUIPH8TvUha/hpZKR632GXENpKzW nIfix5Z2KShNIbhKHCDrQrD/4JuABBCONal68J47b5nHKmnJVExnBJSH27vNRsSKbtHu+syr3 EVgDJPruPE3w3Aza3c3a4SHtJ5NoDUFAH1Vk/MAKS2Xu8dN6GsnU0SLxb6gR61zhm6fN6oGyT +zRTuNvwh7zioL4j8T2N1HPVFOJjIbZ2NOuSr3CdetNBAdjCsxhNYgskJSJxyFyoV/6AgWOFz qb2wZ7QOcKhIaWMvlBY3OXlsnTuZRua7VPeCwDgCmbDRkvVqZzCxARKmHYuVFtL+8Tjj5N5zY Xz8/YuIi+ekM3FZm+qkQkTMoQTbA2sSvGcqaa5ND9z5aE7FBl57ysmqWa/zUpg73TMN9uyKMW 797EQmsebDbogfQCuEC16pLXeJScXWhsulH0JDbDyjdmG2NOj4EdOCApPiIKNGZPQFsdZDK4w hQ8M0HiomEWZrSaP Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 993 Lines: 23 On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote: > > I don't see anywhere in the SBSA spec addendum that the PCI > configuration space section that unaligned accesses *MUST* be supported. > > If this is required, please have this info added to the spec. I can work > with the designers for the next chip. > > Unaligned access on the current hardware returns incomplete values or > can cause bus faults. The behavior is undefined. Unaligned accesses are not allowed, but any PCI compliant device must support aligned 1, 2 or 4 byte accesses on its configuration space, though the byte-enable mechanism. In an ECAM host bridge, those are mapped to load/store accesses from the CPU with the respective width and natural alignment. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/