Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965251AbbKCXEB (ORCPT ); Tue, 3 Nov 2015 18:04:01 -0500 Received: from mout.gmx.net ([212.227.15.18]:56819 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965023AbbKCXD4 (ORCPT ); Tue, 3 Nov 2015 18:03:56 -0500 Subject: Re: [GIT PULL] parisc architecture updates for v4.3 To: Linus Torvalds , David Miller References: <20151025114934.GA11108@ls3530.box> Cc: Linux Kernel Mailing List , Parisc List , James Bottomley , John David Anglin , Network Development From: Helge Deller X-Enigmail-Draft-Status: N1110 Message-ID: <56393D46.6060903@gmx.de> Date: Wed, 4 Nov 2015 00:03:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Provags-ID: V03:K0:oYx38rBRWoe5i8lv0xi19NKd88LNf770+iQ4xWLpPtSnCtgAn3Z AOoV7u9iEaoTV+NMibpvIilJ8D6fg7ZbZwfEd89+L3/HfA4xDAbK8aGWjAHrjGxJQcpOose HvO+3oz3Yd8hDq1m9vEyaT6OKQBJ4u8pq52aFjVyMfQg+SsFhqgvFB9YgMQLlcmHVqG/Q5c F5cPOr1ktxeyCtyPPrn4g== X-UI-Out-Filterresults: notjunk:1;V01:K0:pVoIyZXyMas=:zUIuiFtTuHTcwHGecfTe7n nXZfgWvMAC7CwuaGvcWv1JwEx6wedrYOjaziYprYiL54lujnC9KOrI9f9FqDN9Z5iYbM3iA+L YeSKU4QFZ/I6YlTjDk2CywgJ2gNCSV3SMkjoKGBv0HxoCqec4NO6ft/x3PduuqYLhFg+H/G5f aPWmS3iPzw9tAzmObNHPX1xiC70hwyXBivDtdrXdAwZSGf3JV5ic5wF3y9uPrn9uzY24E+/Wn OB5Ui5rZ1pngwPr1AEG+GwS6y+qqpp2jdhuoM/YOl3/sTFY4e2JuaJE5viRGtD+j8EGpcDdbp yKLu3tvWNsUT0vgpGh+TI2r72SdIScA2UjHskOmJvk4iMxOiu2G67naxfCr9gekTZzIVTXYp7 0Le+4QfeNaG6J1af/mjsckJxzOMiPhrw7IApyZl/cSHtYWZEdpEweGpGd7/32lbUsp+Hm91u+ W4NUEE9tktpHtXVjSy5oh4dmjj4tW9QycybBAe+/Jr/fgr77nTSfH7om7+RyH1PjX5ipufJxd 5pbshF7ZHac6uYFB9eOGzXXFMw73eoWWXL5FuPzXD+L0365kPlOxgJjEdLFfQFXMVrer6OB8S fr1b/Tad3nCsyNoCZntchj1ja49iqqU4W3dT2ntR2RApAMP0TdUu0i1duOPhUMw3iNuV+qpSv Xe8PHhi6NIAPg0lDZI/JeBycIvPZvWE67S349E2YMHnC9iUj+QthEYkI4Ltjev1Rm2Rs2rVFf XoeA1C2FOL7vVaDrh878gXQAC7e38qJN6ghD0JCLmGNuN2td273FdvfK1W1zehmQO4SkgH9Yc DzAHK6/ Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3040 Lines: 78 Hi Linus, On 03.11.2015 22:01, Linus Torvalds wrote: > On Sun, Oct 25, 2015 at 4:49 AM, Helge Deller wrote: >> >> please pull some patches for the parisc architecture for kernel v4.3 from: > > So no way was I going to pull that for 4.3, Yes, since you didn't pulled I assumed you saw some kind of problem with the patches. Maybe it's even my fault, because I should have explained some more in the pull request, e.g. that all patches were discussed with the various stakeholders, and e.g. that I was late in sending this pull request, because I was waiting for some benchmark results. > and I delayed it to the merge window. Ok. > However, even now that we're in the merge window, and I look at it again: > >> The most important change is that we reduce L1_CACHE_BYTES to 16 bytes, for >> which a trivial patch for XPS in the network layer was needed. > > I'd really want the network people involved with that change, As David already answered, it was discussed with them: http://marc.info/?t=144554413000001&r=1&w=2 > and I'm > also wondering why you seem to want to re-define L1_CACHE_BYTES to > something that it isn't. > I doubt the PA-RISC L1 cacheline really is 16 bytes. Sadly it's nowhere clearly documented how big the L1 cacheline of parisc really is. We are currently experimenting a lot with improving spinlocks on hppa, that's why we play around with the L1 cache size setting. In one of the mail threads (where I actually wanted to align the hashes which we need to protect/simulate the atomic locks) James Bottomleys gave a pretty good explanation of why it might be beneficial to modify L1_CACHE_BYTES for parisc: http://permalink.gmane.org/gmane.linux.ports.parisc/26040 The whole mail thread is here: http://thread.gmane.org/gmane.linux.ports.parisc/26000 > So this seems to > be more of a hack around the fact that some data structures may be > over-aligned, and using that L1_CACHE_BYTES for aligning things that > really don't want to be that aligned. Maybe it casues less sharing, > but if it does so at the cost of excessive memory use, it's still > wrong. > > But that in turn says to me "We should fix the *real* problem, rather > than hack around it by having PA-RISC lie about its L1 cache size". > > Is there any particular over-alignment that you have determined to be > the real problem? I was not very much concerned about any over-alignment, but about the performance. Reducing L1_CACHE_BYTES gave a performance improvement on parisc, most likely since we protect atomic accesses through our atomic spinlocks anyway. > Also, just looking at other things, we currently do have openrisc that has > > #define L1_CACHE_BYTES 16 > > so presumably openrisc would have had an issue with that XPS thing, and mn10300. Helge -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/