Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756145AbbKCXxg (ORCPT ); Tue, 3 Nov 2015 18:53:36 -0500 Received: from belmont80srvr.owm.bell.net ([184.150.200.80]:45801 "EHLO mtlfep02.bell.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752025AbbKCXxe convert rfc822-to-8bit (ORCPT ); Tue, 3 Nov 2015 18:53:34 -0500 X-Greylist: delayed 758 seconds by postgrey-1.27 at vger.kernel.org; Tue, 03 Nov 2015 18:53:34 EST Subject: Re: [GIT PULL] parisc architecture updates for v4.3 Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: John David Anglin In-Reply-To: Date: Tue, 3 Nov 2015 18:53:32 -0500 Cc: Helge Deller , Linus Torvalds , David Miller , Linux Kernel Mailing List , Parisc List , James Bottomley , Network Development Content-Transfer-Encoding: 8BIT Message-Id: <38881C74-60B0-40BC-83ED-052889705FC5@bell.net> References: <20151025114934.GA11108@ls3530.box> <56393D46.6060903@gmx.de> To: Guy Harris X-Mailer: Apple Mail (2.1085) X-Opwv-CommTouchExtSvcRefID: str=0001.0A020204.563948FD.0034,ss=1,re=0.000,fgs=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1242 Lines: 33 On 2015-11-03, at 6:43 PM, Guy Harris wrote: > > On Nov 3, 2015, at 3:03 PM, Helge Deller wrote: > >> Sadly it's nowhere clearly documented how big the L1 cacheline of parisc really is. > > To which particular PA-RISC processor are you referring? It might not be the same on all processors. > > If openpa.net is to be believed, then: > > The 7100LC has 32 byte cache lines on the off-chip cache: > > http://www.openpa.net/pa-risc_processor_pa-7100lc.html > > and the 8500 has "32 or 64 Byte cache line size", which may be referring to the on-chip caches: > > http://www.openpa.net/pa-risc_processor_pa-8500.html Yes, this is correct but these numbers relate to the memory interface. The PA8800 and PA8900 have 128 byte memory interfaces. These numbers are reported by firmware PDC calls. This whole discussion started when I suggested that we needed to bump L1_CACHE_BYTES to 128 bytes on PA8800 and PA8900 processors. -- John David Anglin dave.anglin@bell.net -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/