Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757342AbbKFIuh (ORCPT ); Fri, 6 Nov 2015 03:50:37 -0500 Received: from mail-by2on0055.outbound.protection.outlook.com ([207.46.100.55]:61120 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757240AbbKFIto convert rfc822-to-8bit (ORCPT ); Fri, 6 Nov 2015 03:49:44 -0500 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; linux.intel.com; dkim=none (message not signed) header.d=none;linux.intel.com; dmarc=permerror action=none header.from=amd.com; X-WSS-ID: 0NXDX4K-08-2SK-02 X-M-MSG: From: "Yu, Xiangliang" To: Mika Westerberg CC: "andriy.shevchenko@linux.intel.com" , "jarkko.nikula@linux.intel.com" , "wsa@the-dreams.de" , "linux-i2c@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Xue, Ken" , "Wan, Vincent" , "Huang, Ray" , "Wang, Annie" , "Li, Tony" Subject: RE: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller Thread-Topic: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD controller Thread-Index: AQHRF5yV0mHRMR8KnUO8SEzCTsabDp6M7QYAgAFP1bD//9w0AIAAj54g Date: Fri, 6 Nov 2015 08:33:53 +0000 Message-ID: <1C99EED8F51BBC41A8F1E645B51245F41AE8AAB0@scybexdag03.amd.com> References: <1446726884-30558-1-git-send-email-Xiangliang.Yu@amd.com> <20151105135216.GN1509@lahna.fi.intel.com> <1C99EED8F51BBC41A8F1E645B51245F41AE8AA50@scybexdag03.amd.com> <20151106074608.GR1509@lahna.fi.intel.com> In-Reply-To: <20151106074608.GR1509@lahna.fi.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.237.170.105] Content-Type: text/plain; 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jarkko.nikula@linux.intel.com; > wsa@the-dreams.de; linux-i2c@vger.kernel.org; linux- > kernel@vger.kernel.org; Xue, Ken; Wan, Vincent; Huang, Ray; Wang, Annie; > Li, Tony > Subject: Re: [PATCH 1/1] I2C: designware: fix IO timeout issue for AMD > controller > > On Fri, Nov 06, 2015 at 04:34:19AM +0000, Yu, Xiangliang wrote: > > > -----Original Message----- > > > From: Mika Westerberg [mailto:mika.westerberg@linux.intel.com] > > > Sent: Thursday, November 05, 2015 9:52 PM > > > To: Yu, Xiangliang > > > Cc: andriy.shevchenko@linux.intel.com; > > > jarkko.nikula@linux.intel.com; wsa@the-dreams.de; > > > linux-i2c@vger.kernel.org; linux- kernel@vger.kernel.org; Xue, Ken; > > > Wan, Vincent; Huang, Ray; Wang, Annie; Li, Tony > > > Subject: Re: [PATCH 1/1] I2C: designware: fix IO timeout issue for > > > AMD controller > > > > > > On Thu, Nov 05, 2015 at 08:34:44PM +0800, Xiangliang Yu wrote: > > > > Because of some hardware limitation, AMD I2C controller can't > > > > trigger next interrupt if interrupt status has been changed after > > > > clearing interrupt status bits. Then, I2C will lost interrupt and IO timeout. > > > > > > > > According to hardware design, this patch implements a workaround > > > > to disable i2c controller interrupt after clearing interrupt bits > > > > when entering ISR and to enable i2c interrupt before exiting ISR. > > > > > > > > To reduce the performance impacts on other vendors, use unlikely > > > > function to check flag in ISR. > > > > > > > > Signed-off-by: Xiangliang Yu > > > > --- > > > > drivers/i2c/busses/i2c-designware-core.c | 6 ++++++ > > > > drivers/i2c/busses/i2c-designware-core.h | 1 + > > > > drivers/i2c/busses/i2c-designware-platdrv.c | 4 ++++ > > > > 3 files changed, 11 insertions(+) > > > > > > > > diff --git a/drivers/i2c/busses/i2c-designware-core.c > > > > b/drivers/i2c/busses/i2c-designware-core.c > > > > index 7441cdc..04e7b65 100644 > > > > --- a/drivers/i2c/busses/i2c-designware-core.c > > > > +++ b/drivers/i2c/busses/i2c-designware-core.c > > > > @@ -783,6 +783,9 @@ irqreturn_t i2c_dw_isr(int this_irq, void > > > > *dev_id) > > > > > > > > stat = i2c_dw_read_clear_intrbits(dev); > > > > > > What if the status changes right here, before you go and mask the > interrupt? > > Have no effect, because i2c controller can't trigger next interrupt. > > > > > > > > > > > > > + if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) > > > > + i2c_dw_disable_int(dev); > > > > + > > > > if (stat & DW_IC_INTR_TX_ABRT) { > > > > dev->cmd_err |= DW_IC_ERR_TX_ABRT; > > > > dev->status = STATUS_IDLE; > > > > @@ -811,6 +814,9 @@ tx_aborted: > > > > if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || > > > dev->msg_err) > > > > complete(&dev->cmd_complete); > > > > > > > > + if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) > > > > + dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, > > > DW_IC_INTR_MASK); > > > > > > The driver disables TX interrupt when it is not needed anymore or > > > when TX gets aborted but the above will re-enable all interrupts > regardless. > > > Is that the intention? > > No, i2c controller can trigger next interrupt only after re-enable all interrupt. > > If you get an error the function masks all interrupts and jumps to tx_aborted > label. With this patch you unmask all interrupts again before exiting the > function. > I see, how about change if statement to else if? > > > > > > > + > > > > return IRQ_HANDLED; > > > > } > > > > EXPORT_SYMBOL_GPL(i2c_dw_isr); > > > > diff --git a/drivers/i2c/busses/i2c-designware-core.h > > > > b/drivers/i2c/busses/i2c-designware-core.h > > > > index 9630222..808ef6a 100644 > > > > --- a/drivers/i2c/busses/i2c-designware-core.h > > > > +++ b/drivers/i2c/busses/i2c-designware-core.h > > > > @@ -111,6 +111,7 @@ struct dw_i2c_dev { > > > > > > > > #define ACCESS_SWAP 0x00000001 > > > > #define ACCESS_16BIT 0x00000002 > > > > +#define ACCESS_INTR_MASK 0x00000004 > > > > > > > > extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); extern > > > > void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); diff > > > > --git a/drivers/i2c/busses/i2c-designware-platdrv.c > > > > b/drivers/i2c/busses/i2c-designware-platdrv.c > > > > index 472b882..0c59357 100644 > > > > --- a/drivers/i2c/busses/i2c-designware-platdrv.c > > > > +++ b/drivers/i2c/busses/i2c-designware-platdrv.c > > > > @@ -251,6 +251,10 @@ static int dw_i2c_probe(struct > > > > platform_device > > > *pdev) > > > > dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; > > > > dev->adapter.nr = pdev->id; > > > > } > > > > + > > > > + if (!strncmp(pdev->name, "AMD0010", 7)) > > > > + dev->accessor_flags |= ACCESS_INTR_MASK; > > > > + > > > > > > Can't you put this to ->driver_data? For example it could refer to a > > > configuration structure that then contains quirk flags. > > I think it will need to add a function to support it, but the function > > Is rarely used. It will easy to add if i2c driver has quirk mechanisms. > > Added code is very simple and have no influence on others. > > What if the next AMD I2C controller needs another quirk, and then another? > > I would rather pass flags or similar (reference to config structure including > flags) with ->driver_data. > I don't think there is another quirk. > > > > > > > > > r = i2c_dw_init(dev); > > > > if (r) > > > > return r; > > > > -- > > > > 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/