Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753587AbbKJS1U (ORCPT ); Tue, 10 Nov 2015 13:27:20 -0500 Received: from mail-ob0-f170.google.com ([209.85.214.170]:34474 "EHLO mail-ob0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753247AbbKJS1R (ORCPT ); Tue, 10 Nov 2015 13:27:17 -0500 MIME-Version: 1.0 In-Reply-To: References: <1447099142-10220-1-git-send-email-gratian.crisan@ni.com> <20151109220232.GO17308@twins.programming.kicks-ass.net> Date: Tue, 10 Nov 2015 12:27:17 -0600 Message-ID: Subject: Re: [RFC PATCH] tsc: synchronize TSCs on buggy Intel Xeon E5 CPUs with offset error From: Josh Hunt To: Peter Zijlstra Cc: gratian.crisan@ni.com, Thomas Gleixner , LKML , Ingo Molnar , "H . Peter Anvin" , x86@kernel.org, Borislav Petkov , Josh Cartwright , gratian@gmail.com Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1553 Lines: 46 On Tue, Nov 10, 2015 at 12:24 PM, Josh Hunt wrote: > > On Mon, Nov 9, 2015 at 4:02 PM, Peter Zijlstra wrote: >> >> On Mon, Nov 09, 2015 at 01:59:02PM -0600, gratian.crisan@ni.com wrote: >> >> > The Intel Xeon E5 processor family suffers from errata[1] BT81: >> >> > +#ifdef CONFIG_X86_TSC >> > + /* >> > + * Xeon E5 BT81 errata: TSC is not affected by warm reset. >> > + * The TSC registers for CPUs other than CPU0 are not cleared by a warm >> > + * reset resulting in a constant offset error. >> > + */ >> > + if ((c->x86 == 6) && (c->x86_model == 0x3f)) >> > + set_cpu_bug(c, X86_BUG_TSC_OFFSET); >> > +#endif >> >> That's hardly a family, that's just one, Haswell server. > > > Are you actually observing this problem on this processor? > > The document you've referenced and the x86_model # above do not match up. The errata should be for Intel processors with an x86_model value of 0x2d by my calculations: > > Model: 1101b > Extended Model: 0010b > > The calc from cpu_detect() is: > if (c->x86 >= 0x6) > c->x86_model += ((tfms >> 16) & 0xf) << 4; > > 0x3f is a different CPU. > -- > Josh Resending, as gmail inserted html and lkml dropped the previous reply... -- Josh -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/