Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753876AbbKLIRo (ORCPT ); Thu, 12 Nov 2015 03:17:44 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:43263 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753633AbbKLIRn (ORCPT ); Thu, 12 Nov 2015 03:17:43 -0500 Subject: Re: [PATCH v2 0/4] KVM: VMX: enable LBR virtualization To: Paolo Bonzini , , , , , , , References: <1445591718-5720-1-git-send-email-jianjay.zhou@huawei.com> <56435D76.7080402@redhat.com> CC: , , , From: Jian Zhou Message-ID: <56444878.4050901@huawei.com> Date: Thu, 12 Nov 2015 16:06:16 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <56435D76.7080402@redhat.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.177.19.14] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A010202.56444B12.0036,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: b1c3af0e9c647cf1766ac0ba1b689d50 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2126 Lines: 59 On 2015/11/11 23:23, Paolo Bonzini wrote: > > > On 23/10/2015 11:15, Jian Zhou wrote: >> Changelog in v2: >> (1) move the implementation into vmx.c >> (2) migraton is supported >> (3) add arrays in kvm_vcpu_arch struct to save/restore >> LBR MSRs at vm exit/entry time. >> (4) add a parameter of kvm_intel module to permanently >> disable LBRV >> (5) table of supported CPUs is reorgnized, LBRV >> can be enabled or not according to the guest CPUID >> >> Jian Zhou (4): >> KVM: X86: Add arrays to save/restore LBR MSRs >> KVM: X86: LBR MSRs of supported CPU types >> KVM: X86: Migration is supported >> KVM: VMX: details of LBR virtualization implementation >> >> arch/x86/include/asm/kvm_host.h | 26 ++++- >> arch/x86/include/asm/msr-index.h | 26 ++++- >> arch/x86/kvm/vmx.c | 245 +++++++++++++++++++++++++++++++++++++++ >> arch/x86/kvm/x86.c | 88 ++++++++++++-- >> 4 files changed, 366 insertions(+), 19 deletions(-) > > Thanks, this looks better! > > The reason why it took me so long to review it, is that I wanted to > understand what happens if you're running this on CPU model x but using > CPU model y for the guest. I still haven't grokked that fully, so I'll > apply your patches locally and play with them. Yes, that is a good question. I plan to write a kernel module in the guest to read/write the MSR_IA32_DEBUGCTLMSR and MSRs of LBR stack with host CPU model e.g. SandyBridge while using guest CPU model e.g. core2duo for the guest. (The address of MSRs recording last branch information between SandyBridge and core2duo is different) > In the meanwhile, feel free to send v3 with: 1) the tweak I suggested to > patch 3; 2) the fix for the problem that the buildbot reported on patch 1. Okay, will fix them in v3. Thanks, Jian > Paolo > > . > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/