Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754239AbbKLKHe (ORCPT ); Thu, 12 Nov 2015 05:07:34 -0500 Received: from mail-bl2on0117.outbound.protection.outlook.com ([65.55.169.117]:59616 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753853AbbKLKHb convert rfc822-to-8bit (ORCPT ); Thu, 12 Nov 2015 05:07:31 -0500 From: Yao Yuan To: Xu Han CC: Fabio Estevam , David Woodhouse , Brian Norris , Li Leo , Scott Wood , "linux-mtd@lists.infradead.org" , linux-kernel Subject: RE: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support Thread-Topic: [PATCH] mtd: spi-nor: fsl-quadspi: add big-endian support Thread-Index: AQHRDWk5MGCxq2okoEiuI4jHqHziEJ56y6iAgAkFj7CAE2cSgIABDYMw Date: Thu, 12 Nov 2015 10:07:29 +0000 Message-ID: References: <1445586797-38383-1-git-send-email-yao.yuan@freescale.com> <20151111175112.GA30612@chopperman.am.freescale.net> In-Reply-To: <20151111175112.GA30612@chopperman.am.freescale.net> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yao.yuan@freescale.com; x-originating-ip: [199.59.230.102] x-microsoft-exchange-diagnostics: 1;BLUPR03MB549;5:lultF/zCK+FfmwRwcGo81E/yDchRZOISsLGOslGe2eR7b2cPWgmHhLD8WVtFCMM/uScZ/Drucg1Y83uOmbiMz6tfeZqxeQNoERxd8PALcN8DJnXTMBDCOJt1dgpkTtR7zwdiYSYoOfBctRZcgnXOrA==;24:TLIxvlPabi2yb0+uGJIx+uGQA5CI8JBoaxCXtgCOliuWZkZdiZgYHr4WZtjWFSzJcXSzVTLXPBPTMg+usYwl+9Vaf7275LHa9n50AzLbAdw=;20:9qXhLbrFBKBNEiWcbA9k8hxE5gU2DXobeGJMhgCJeqma1Wp6YPP9/L5nTltxsso46Q+qKYiaYwk4qtv1lwbL1A== x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB549; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(5005006)(520078)(3002001)(10201501046);SRVR:BLUPR03MB549;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB549; x-forefront-prvs: 07584EDBCD x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(199003)(377424004)(24454002)(189002)(5004730100002)(5008740100001)(86362001)(92566002)(2900100001)(50986999)(54356999)(66066001)(110136002)(93886004)(11100500001)(101416001)(5002640100001)(40100003)(189998001)(5003600100002)(5001960100002)(5007970100001)(99286002)(5001920100001)(76176999)(10400500002)(74316001)(81156007)(2950100001)(76576001)(97736004)(102836002)(85806002)(4001150100001)(87936001)(33656002)(4001450100002)(105586002)(106116001)(122556002)(106356001);DIR:OUT;SFP:1102;SCL:1;SRVR:BLUPR03MB549;H:BLUPR03MB134.namprd03.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Nov 2015 10:07:29.1047 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB549 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1966 Lines: 48 On Wed, 2015-11-11 at 11:51 -0600, Han Xu wrote: > On Fri, Oct 30, 2015 at 04:49:41AM -0500, Yuan Yao-B46683 wrote: > > Hi Fabio Estevam, > > > > Thanks for your suggestion. > > We have an internal discussions for that. > > > > We think that: > > According to the initial commit message of regmap, it is targeting non- > memory mapped buses. (regmap: Add generic non-memory mapped register > access API) But in the imx2_wdt driver, it is used for memory-mapped register > space. So it seems that using such a complex framework just to deal with > endian is an over-kill. > > > > when it is not necessary to enable the clock every time we access the register. > > We don't think it is obvious to us how to use it for handling endianness, > especially not the way imx2_wdt uses regmap. __regmap_init_mmio_clk() > calls regmap_mmio_gen_context() which errors out if reg_format_endian is > not REGMAP_ENDIAN_DEFAULT or REGMAP_ENDIAN_NATIVE, and elsewhere > regmap-mmio.c It seems only little-endian accessors. > > > > Although it is possible to add the endianness support in the > > regmap_mmio driver, we don't see too much value in using it especially > > > > So we think: > > static void qspi_writel(struct fsl_qspi *q, u32 val, void __iomem > > *addr) { > > if (q->big_endian) > > iowrite32be(val, addr); > > else > > iowrite32(val, addr); > > } > > This way is an easier, more effective solution to do the endian issue. > > > > How about your think? > > I think the implement is fine, but I prefer to use quirk rather than read from dts? > Please also rebase the patch to latest l2-mtd code. > Ok, I will rebase the patch to latest l2-mtd code in the next version. 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