Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754505AbbKMAsU (ORCPT ); Thu, 12 Nov 2015 19:48:20 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:39004 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754205AbbKMAsS (ORCPT ); Thu, 12 Nov 2015 19:48:18 -0500 Date: Fri, 13 Nov 2015 00:48:15 +0000 From: "Maciej W. Rozycki" To: Ralf Baechle CC: Andrew Morton , Matthew Fortune , , Subject: [PATCH 7/8] MIPS: Determine the presence of IEEE Std 754-2008 features In-Reply-To: Message-ID: References: User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" X-Originating-IP: [10.100.200.62] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3997 Lines: 121 Determine the presence of and the amount of control available over IEEE Std 754-2008 features. In the case of a hardware FPU being used examine the FIR register for the presence of the HAS2008 bit and then the FCSR register for the writability of the ABS2008 and NAN2008 bits and the hardwired state of each of these bits if read-only. Update the initial FCSR contents used for threads and the FCSR writability mask accordingly. For full FPU emulation and MIPS32 or MIPS64 processors make the FCSR ABS2008 and NAN2008 bits writable. Signed-off-by: Maciej W. Rozycki --- linux-mips-cpu-nan2008.diff Index: linux-sfr-test/arch/mips/kernel/cpu-probe.c =================================================================== --- linux-sfr-test.orig/arch/mips/kernel/cpu-probe.c 2015-09-04 21:35:56.582838000 +0100 +++ linux-sfr-test/arch/mips/kernel/cpu-probe.c 2015-09-04 21:36:39.738114000 +0100 @@ -99,6 +99,78 @@ static inline void cpu_set_fpu_fcsr_mask } /* + * Determine the IEEE 754 NaN encodings and ABS.fmt/NEG.fmt execution modes + * supported by FPU hardware. + */ +static void cpu_set_fpu_2008(struct cpuinfo_mips *c) +{ + if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | + MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 | + MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6)) { + unsigned long sr, fir, fcsr, fcsr0, fcsr1; + + sr = read_c0_status(); + __enable_fpu(FPU_AS_IS); + + fir = read_32bit_cp1_register(CP1_REVISION); + if (fir & MIPS_FPIR_HAS2008) { + fcsr = read_32bit_cp1_register(CP1_STATUS); + + fcsr0 = fcsr & ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008); + write_32bit_cp1_register(CP1_STATUS, fcsr0); + fcsr0 = read_32bit_cp1_register(CP1_STATUS); + + fcsr1 = fcsr | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; + write_32bit_cp1_register(CP1_STATUS, fcsr1); + fcsr1 = read_32bit_cp1_register(CP1_STATUS); + + write_32bit_cp1_register(CP1_STATUS, fcsr); + + if (!(fcsr0 & FPU_CSR_NAN2008)) + c->options |= MIPS_CPU_NAN_LEGACY; + if (fcsr1 & FPU_CSR_NAN2008) + c->options |= MIPS_CPU_NAN_2008; + + if ((fcsr0 ^ fcsr1) & FPU_CSR_ABS2008) + c->fpu_msk31 &= ~FPU_CSR_ABS2008; + else + c->fpu_csr31 |= fcsr & FPU_CSR_ABS2008; + + if ((fcsr0 ^ fcsr1) & FPU_CSR_NAN2008) + c->fpu_msk31 &= ~FPU_CSR_NAN2008; + else + c->fpu_csr31 |= fcsr & FPU_CSR_NAN2008; + } else { + c->options |= MIPS_CPU_NAN_LEGACY; + } + + write_c0_status(sr); + } else { + c->options |= MIPS_CPU_NAN_LEGACY; + } +} + +/* + * Set the IEEE 754 NaN encodings and ABS.fmt/NEG.fmt execution modes + * for the FPU emulator. Clear the flags where required in case called + * from `fpu_disable', to override details obtained from FPU hardware. + */ +static void cpu_set_nofpu_2008(struct cpuinfo_mips *c) +{ + c->fpu_csr31 &= ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008); + if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | + MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 | + MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6)) { + c->options |= MIPS_CPU_NAN_2008 | MIPS_CPU_NAN_LEGACY; + c->fpu_msk31 &= ~(FPU_CSR_ABS2008 | FPU_CSR_NAN2008); + } else { + c->options &= ~MIPS_CPU_NAN_2008; + c->options |= MIPS_CPU_NAN_LEGACY; + c->fpu_msk31 |= FPU_CSR_ABS2008 | FPU_CSR_NAN2008; + } +} + +/* * Set the FIR feature flags for the FPU emulator. */ static void cpu_set_nofpu_id(struct cpuinfo_mips *c) @@ -139,7 +211,7 @@ static void cpu_set_fpu_opts(struct cpui } cpu_set_fpu_fcsr_mask(c); - c->options |= MIPS_CPU_NAN_LEGACY; + cpu_set_fpu_2008(c); } /* @@ -150,7 +222,7 @@ static void cpu_set_nofpu_opts(struct cp c->options &= ~MIPS_CPU_FPU; c->fpu_msk31 = mips_nofpu_msk31; - c->options |= MIPS_CPU_NAN_LEGACY; + cpu_set_nofpu_2008(c); cpu_set_nofpu_id(c); } -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/