Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754550AbbKQSZp (ORCPT ); Tue, 17 Nov 2015 13:25:45 -0500 Received: from mail-sn1nam02on0070.outbound.protection.outlook.com ([104.47.36.70]:20061 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753591AbbKQSZo (ORCPT ); Tue, 17 Nov 2015 13:25:44 -0500 X-Greylist: delayed 1051 seconds by postgrey-1.27 at vger.kernel.org; Tue, 17 Nov 2015 13:25:43 EST Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; ettus.com; dkim=none (message not signed) header.d=none;ettus.com; dmarc=bestguesspass action=none header.from=xilinx.com; Subject: Re: [PATCH] fpga: zynq-fpga: Avoid hammering clk_{enable/disable}. To: Moritz Fischer , References: <1447780317-27758-1-git-send-email-moritz.fischer@ettus.com> CC: , , , , From: Michal Simek Message-ID: <564B6988.5020104@xilinx.com> Date: Tue, 17 Nov 2015 18:53:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1447780317-27758-1-git-send-email-moritz.fischer@ettus.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-21946.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(164054003)(199003)(189002)(24454002)(63266004)(586003)(87936001)(6806005)(92566002)(77096005)(33656002)(47776003)(230700001)(86362001)(65956001)(65806001)(50466002)(19580395003)(11100500001)(5001770100001)(4001350100001)(81156007)(5001920100001)(64126003)(36756003)(19580405001)(5007970100001)(80316001)(83506001)(5001960100002)(106466001)(189998001)(2950100001)(59896002)(5008740100001)(54356999)(50986999)(65816999)(87266999)(36386004)(76176999)(23746002)(107986001)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT100;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;PTR:xapps1.xilinx.com,unknown-60-100.xilinx.com;A:1;MX:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501001);SRVR:SN1NAM02HT100; X-Microsoft-Antispam-PRVS: <39048d7614e64701912cf4b3dd83b80a@SN1NAM02HT100.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(5005006)(520078)(3002001)(10201501046);SRVR:SN1NAM02HT100;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT100; X-Forefront-PRVS: 07630F72AD X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2015 17:53:22.6502 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT100 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5056 Lines: 196 On 17.11.2015 18:11, Moritz Fischer wrote: > Replaced constant clock_{enable,disable} calls with pm_runtime > hooks. > > Signed-off-by: Moritz Fischer > --- > drivers/fpga/zynq-fpga.c | 79 +++++++++++++++++++++++++++++++++++++----------- > 1 file changed, 62 insertions(+), 17 deletions(-) > > diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c > index c2fb412..5c03fb8 100644 > --- a/drivers/fpga/zynq-fpga.c > +++ b/drivers/fpga/zynq-fpga.c > @@ -28,6 +28,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -184,8 +185,8 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, u32 flags, > > priv = mgr->priv; > > - err = clk_enable(priv->clk); > - if (err) > + err = pm_runtime_get_sync(priv->dev); > + if (err < 0) > return err; > > /* don't globally reset PL if we're doing partial reconfig */ > @@ -271,12 +272,12 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr, u32 flags, > ctrl = zynq_fpga_read(priv, MCTRL_OFFSET); > zynq_fpga_write(priv, MCTRL_OFFSET, (~MCTRL_PCAP_LPBK_MASK & ctrl)); > > - clk_disable(priv->clk); > + pm_runtime_put(priv->dev); > > return 0; > > out_err: > - clk_disable(priv->clk); > + pm_runtime_put(priv->dev); > > return err; > } > @@ -301,9 +302,8 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, > > memcpy(kbuf, buf, count); > > - /* enable clock */ > - err = clk_enable(priv->clk); > - if (err) > + err = pm_runtime_get_sync(priv->dev); > + if (err < 0) > goto out_free; > > zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK); > @@ -335,7 +335,7 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, > err = -EFAULT; > } > > - clk_disable(priv->clk); > + pm_runtime_put(priv->dev); > > out_free: > dma_free_coherent(priv->dev, in_count, kbuf, dma_addr); > @@ -349,8 +349,8 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr, u32 flags) > int err; > u32 intr_status; > > - err = clk_enable(priv->clk); > - if (err) > + err = pm_runtime_get_sync(priv->dev); > + if (err < 0) > return err; > > err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status, > @@ -358,7 +358,7 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr, u32 flags) > INIT_POLL_DELAY, > INIT_POLL_TIMEOUT); > > - clk_disable(priv->clk); > + pm_runtime_put(priv->dev); > > if (err) > return err; > @@ -385,12 +385,12 @@ static enum fpga_mgr_states zynq_fpga_ops_state(struct fpga_manager *mgr) > > priv = mgr->priv; > > - err = clk_enable(priv->clk); > - if (err) > + err = pm_runtime_get_sync(priv->dev); > + if (err < 0) > return FPGA_MGR_STATE_UNKNOWN; > > intr_status = zynq_fpga_read(priv, INT_STS_OFFSET); > - clk_disable(priv->clk); > + pm_runtime_put(priv->dev); > > if (intr_status & IXR_PCFG_DONE_MASK) > return FPGA_MGR_STATE_OPERATING; > @@ -457,19 +457,26 @@ static int zynq_fpga_probe(struct platform_device *pdev) > return err; > } > > + pm_runtime_get_noresume(&pdev->dev); > + pm_runtime_set_active(&pdev->dev); > + pm_runtime_enable(&pdev->dev); > + > /* unlock the device */ > zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK); > > - clk_disable(priv->clk); > > err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager", > &zynq_fpga_ops, priv); > if (err) { > dev_err(dev, "unable to register FPGA manager"); > - clk_unprepare(priv->clk); > + clk_disable_unprepare(priv->clk); > + pm_runtime_put_noidle(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > return err; > } > > + pm_runtime_put(&pdev->dev); > + > return 0; > } > > @@ -483,11 +490,48 @@ static int zynq_fpga_remove(struct platform_device *pdev) > > fpga_mgr_unregister(&pdev->dev); > > - clk_unprepare(priv->clk); > + pm_runtime_get_sync(&pdev->dev); > + clk_disable_unprepare(priv->clk); > + pm_runtime_put_noidle(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > > return 0; > } > > +#ifdef CONFIG_PM remove this > +static int zynq_fpga_runtime_suspend(struct device *dev) add __maybe_unused here > +{ > + struct zynq_fpga_priv *priv; > + struct fpga_manager *mgr; > + > + mgr = dev_get_drvdata(dev); > + priv = mgr->priv; > + > + clk_disable(priv->clk); > + > + return 0; > +} > + > +static int zynq_fpga_runtime_resume(struct device *dev) and here > +{ > + struct zynq_fpga_priv *priv; > + struct fpga_manager *mgr; > + > + mgr = dev_get_drvdata(dev); > + priv = mgr->priv; > + > + clk_enable(priv->clk); > + > + return 0; > +} > + > +#endif and remove this. Body has nothing specific what it is available only for CONFIG_PM that's why it should just work. Thanks, Michal -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/