Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932583AbbKQTlM (ORCPT ); Tue, 17 Nov 2015 14:41:12 -0500 Received: from mail.kernel.org ([198.145.29.136]:52631 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932486AbbKQTlI (ORCPT ); Tue, 17 Nov 2015 14:41:08 -0500 Date: Tue, 17 Nov 2015 13:41:00 -0600 From: Rob Herring To: Tiffany Lin Cc: Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Mauro Carvalho Chehab , Matthias Brugger , Daniel Kurtz , Sascha Hauer , Hongzhou Yang , Hans Verkuil , Laurent Pinchart , Sakari Ailus , Geert Uytterhoeven , Mikhail Ulyanov , Fabien Dessenne , Arnd Bergmann , Darren Etheridge , Peter Griffin , Benoit Parrot , Andrew-CT Chen , Eddie Huang , Yingjoe Chen , James Liao , Daniel Hsiao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: Re: [RESEND RFC/PATCH 4/8] dt-bindings: Add a binding for Mediatek Video Encoder Message-ID: <20151117194100.GA3028@rob-hp-laptop> References: <1447764885-23100-1-git-send-email-tiffany.lin@mediatek.com> <1447764885-23100-5-git-send-email-tiffany.lin@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1447764885-23100-5-git-send-email-tiffany.lin@mediatek.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3952 Lines: 88 On Tue, Nov 17, 2015 at 08:54:41PM +0800, Tiffany Lin wrote: > add a DT binding documentation of Video Encoder for the > MT8173 SoC from Mediatek. > > Signed-off-by: Tiffany Lin > --- > .../devicetree/bindings/media/mediatek-vcodec.txt | 58 ++++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt > > diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > new file mode 100644 > index 0000000..fea4d7c > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt > @@ -0,0 +1,58 @@ > +Mediatek Video Codec > + > +Mediatek Video Codec is the video codec hw present in Mediatek SoCs which > +supports high resolution encoding functionalities. > + > +Required properties: > +- compatible : "mediatek,mt8173-vcodec-enc" for encoder > +- reg : Physical base address of the video codec registers and length of > + memory mapped region. > +- interrupts : interrupt number to the cpu. > +- larb : must contain the larbes of current platform What is this? > +- clocks : list of clock specifiers, corresponding to entries in > + the clock-names property; > +- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck" > +- iommus : list of iommus specifiers should be enabled for hw encode. > + There are 2 cells needed to enable/disable iommu. > + The first one is local arbiter index(larbid), and the other is port > + index(portid) within local arbiter. Specifies the larbid and portid > + as defined in dt-binding/memory/mt8173-larb-port.h. > +- vpu : the node of video processor unit This should be prefixed with mediatek. > + > +Example: > +vcodec_enc: vcodec@0x18002000 { > + compatible = "mediatek,mt8173-vcodec-enc"; > + reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ > + <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ > + interrupts = , > + ; > + larb = <&larb3>, > + <&larb5>; > + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; > + vpu = <&vpu>; > + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, > + <&topckgen CLK_TOP_VENC_LT_SEL>, > + <&topckgen CLK_TOP_VCODECPLL_370P5>; > + clock-names = "vencpll", > + "venc_lt_sel", > + "vcodecpll_370p5_ck"; > + }; > -- > 1.7.9.5 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/