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Date: Thu, 27 Feb 2003 13:14:06 +0100
From: Ingo Oeser <ingo.oeser@informatik.tu-chemnitz.de>
To: Jonathan Lundell <linux@lundell-bros.com>
Cc: Alan Cox <alan@redhat.com>, Kimball Brown <kimball@serverworks.com>,
       davej@codemonkey.org.uk, torvalds@transmeta.com,
       linux-kernel@vger.kernel.org
Subject: Re: Tighten up serverworks workaround.
Message-ID: <20030227131406.Q629@nightmaster.csn.tu-chemnitz.de>
References: <200302261803.h1QI3BT24020@devserv.devel.redhat.com> <p05210508ba82bc0ea504@[207.213.214.37]>
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In-Reply-To: <p05210508ba82bc0ea504@[207.213.214.37]>; from linux@lundell-bros.com on Wed, Feb 26, 2003 at 10:47:52AM -0800
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Hello there,

On Wed, Feb 26, 2003 at 10:47:52AM -0800, Jonathan Lundell wrote:
> At 1:03pm -0500 2/26/03, Alan Cox wrote:
> >  > How can e help?  Please give me a configuration and how the bug manifests
> >>  inself.
> >
> >OSB4 chipset system, some memory areas marked write combining with the
> >processor memory type range registers. A long time ago Dell (I
> >think) reported corruption from this and submitted changes to block the
> >use of write combining on OSB4. The question has arisen as to whether
> >thats a known thing, and if so which release of the chipset fixed it so that
> >people can only apply such a restriction to problem cases not all OSB4.
> 
> Presumably we're talking about CNB30 (the north bridge) rather than 
> OSB4 (the south bridge).

No it's about CNB20LE. I'm one of the low performance victims.
And this is an ASUS board (CUR-DLS) (which proved not worth its
prices recently).

Regards

Ingo Oeser
-- 
Science is what we can tell a computer. Art is everything else. --- D.E.Knuth
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