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Subject: Re: Minutes from Feb 21 LSE Call
From: Daniel Egger <degger@fhm.edu>
To: Bernd Eckenfels <ecki@calista.eckenfels.6bone.ka-ip.net>
Cc: linux-kernel@vger.kernel.org
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Am Mit, 2003-02-26 um 06.30 schrieb Bernd Eckenfels:

> > unfortunantly for them the core CPU speeds became uncoupled from the
> > memory speeds and skyrocketed up to the point where CISC cores are as f=
ast
> > or faster then the 'high speed' RISC cores.

> Hmm.. are there any RISC Cores which run even closely to CISC Speeds?

Define RISC and CISC: do you mean pure RISC implementations or RISC
implementations with CISC frontend?

Define Speed: Felt speed, clock speed or measurable speed?

I'm convinced that for each (sensible) combination of definations above
there's a clear indication that your question is wrong.

--=20
Servus,
       Daniel

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