Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161695AbbKSVNb (ORCPT ); Thu, 19 Nov 2015 16:13:31 -0500 Received: from galahad.ideasonboard.com ([185.26.127.97]:33193 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934121AbbKSVN3 (ORCPT ); Thu, 19 Nov 2015 16:13:29 -0500 From: Laurent Pinchart To: Geert Uytterhoeven Cc: Geert Uytterhoeven , Greg Kroah-Hartman , Simon Horman , Magnus Damm , Yoshinori Sato , "linux-serial@vger.kernel.org" , Linux-sh list , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: Re: [PATCH 02/25] serial: sh-sci: Update DT binding documentation for BRG support Date: Thu, 19 Nov 2015 23:13:37 +0200 Message-ID: <3455553.NW0SflpMPP@avalon> User-Agent: KMail/4.14.8 (Linux/4.0.9-gentoo; KDE/4.14.8; x86_64; ; ) In-Reply-To: References: <1447958344-836-1-git-send-email-geert+renesas@glider.be> <1577961.dn1fd8r35p@avalon> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1873 Lines: 49 Hi Geert, On Thursday 19 November 2015 21:44:27 Geert Uytterhoeven wrote: > On Thu, Nov 19, 2015 at 9:26 PM, Laurent Pinchart wrote: > > On Thursday 19 November 2015 19:38:41 Geert Uytterhoeven wrote: > >> Amend the DT bindings to include the optional clock sources for the Baud > >> Rate Generator for External Clock (BRG), as found on some SCIF variants > >> and on HSCIF. > >> > >> --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt > >> +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt > >> > >> @@ -46,6 +46,12 @@ Required properties: > >> On (H)SCI(F) and some SCIFA, an additional clock may be specified: > >> - "hsck" for the optional external clock input (on HSCIF), > >> - "sck" for the optional external clock input (on other variants). > >> > >> + On UARTs equipped with a Baud Rate Generator for External Clock > >> (BRG) > >> + (some SCIF and HSCIF), additional clocks may be specified: > >> + - "int_clk" for the optional internal clock source for the > >> frequency > >> + divider (typically the (AXI or SHwy) bus clock), > > > > Isn't this always the same clock as the SCIF functional clock ? > > (On R-Car Gen2/3) > > No, SCIF uses different parents for fck (p) and int_clk (zs). Right, my bad. Should we rename "int_clk" to something that makes it explicit that the clock is used as the BRG-EC input ? Maybe brg_clk, int_brg, int_brg_clk ? We probably don't need to keep the _clk suffix as it's quite evident that a clock name refers to a clock. > HSCIF uses the same parents though (zs). -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/