Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161902AbbKTC3A (ORCPT ); Thu, 19 Nov 2015 21:29:00 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:25799 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934895AbbKTC2o (ORCPT ); Thu, 19 Nov 2015 21:28:44 -0500 From: Chen Feng To: , , , , , , , , CC: , , , , , Subject: [PATCH V5 RESEND 0/3] Add iommu support for hi6220 HiKey board Date: Fri, 20 Nov 2015 10:25:06 +0800 Message-ID: <1447986309-47548-1-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.184.163.62] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0203.564E8493.0053,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: f32a2b3cd96685202819cd13a26e7dad Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3304 Lines: 68 The patch sets add iommu support for Hi6220 SoC. Current testing and support board is Hikey which is one of 96boards. It is an arm64 open source board. For more information about this board, please access https://www.96boards.org. The Architecture of SMMU on Hi6220 SoC: +------------------------------------------------------------------+ | | | +---------+ +--------+ +-------------+ +-------+ | | | ADE | | ISP | | V/J codec | | G3D | | | +----|----+ +---|----+ +------|------+ +---|---| | | | | | | | | ---------v-----------v--------------v--------------v----- | | Media Bus | | --------------------------------|---------------|-------- | | | | | | +---v---------------v--------+ | | | SMMU | | | +----------|---------|-------+ | | | | | +--------------------------------------------|---------|-----------+ | | +------------v---------v-----------+ | DDRC | +----------------------------------+ Note: The media system share the same smmu IP to access DDR memory. And all media IP use the same page table. The hi6220 iommu driver also uses the iova api to manage an iova allocator to ensure that the caller get different iova address. The caller can use the follow sample code to map phy and iova address. eg: struct iommu_domain *domain = iommu_domain_alloc(bus); iommu_attach_device(domain, dev); struct iova_domain *iovad = (struct iova_domain *)m_dev->archdata.iommu; struct iova * t_iova = alloc_iova(iovad, size, limit_pfn, align); iommu_map(domain, t_iova->pfn_lo << 12, phy_addr, size, port); The patch sets are based on 4.4-RC1 V2: Fix tlb flush when unmap V3: Fix format issue and iova address range V5: Add cover-letter and resend to dt maillist Chen Feng (3): docs: iommu: Documentation for iommu in hi6220 SoC iommu/hisilicon: Add hi6220-SoC smmu driver arm64: dts: Add dts node for hi6220 smmu driver .../bindings/iommu/hisi,hi6220-iommu.txt | 32 ++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 13 + drivers/iommu/Kconfig | 11 + drivers/iommu/Makefile | 1 + drivers/iommu/hi6220_iommu.c | 492 +++++++++++++++++++++ 5 files changed, 549 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt create mode 100644 drivers/iommu/hi6220_iommu.c -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/