Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759912AbbKUNL2 (ORCPT ); Sat, 21 Nov 2015 08:11:28 -0500 Received: from proxima.lp0.eu ([81.2.80.65]:54203 "EHLO proxima.lp0.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751518AbbKUNL0 (ORCPT ); Sat, 21 Nov 2015 08:11:26 -0500 To: "devicetree@vger.kernel.org" , Brian Norris , Linux Kernel Mailing List , David Woodhouse , linux-mtd@lists.infradead.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Florian Fainelli From: Simon Arlott Subject: [PATCH 1/2] mtd: brcmnand: Add brcm,nand-bcm63268 device tree binding Message-ID: <56506D55.3000907@simon.arlott.org.uk> Date: Sat, 21 Nov 2015 13:10:45 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2227 Lines: 68 Add device tree binding for NAND on the BCM63268. The BCM63268 has a NAND interrupt register with combined status and enable registers. Signed-off-by: Simon Arlott --- .../devicetree/bindings/mtd/brcm,brcmnand.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt index 4ff7128..45c6e0c 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt @@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w and enable registers - reg-names: (required) "nand-int-base" + * "brcm,nand-bcm63268" + - compatible: should contain "brcm,nand-bcm", "brcm,nand-bcm63268" + - reg: (required) the 'NAND_INTR_BASE' register range, with combined status + and enable registers, and boot address registers + - reg-names: (required) "nand-intr-base" + - clock: (required) reference to the clock for NAND controller + * "brcm,nand-iproc" - reg: (required) the "IDM" register range, for interrupt enable and APB bus access endianness configuration, and the "EXT" register range, @@ -148,3 +155,29 @@ nand@f0442800 { }; }; }; + +nand@0x10000200 { + compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268", + "brcm,brcmnand-v4.0", "brcm,brcmnand"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + reg-names = "nand", "nand-cache", "nand-intr-base"; + interrupt-parent = <&periph_intc>; + interrupts = <50>; + clocks = <&periph_clk 20>; + + #address-cells = <1>; + #size-cells = <0>; + + nand0: nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + nand-ecc-strength = <1>; + nand-ecc-step-size = <512>; + + #address-cells = <0>; + #size-cells = <0>; + }; +}; -- 2.1.4 -- Simon Arlott -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/