Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753541AbbKWSUh (ORCPT ); Mon, 23 Nov 2015 13:20:37 -0500 Received: from mail-pa0-f50.google.com ([209.85.220.50]:33920 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750954AbbKWSUf (ORCPT ); Mon, 23 Nov 2015 13:20:35 -0500 Message-ID: <565358AF.2090609@gmail.com> Date: Mon, 23 Nov 2015 10:19:27 -0800 From: Florian Fainelli User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: Jonas Gorski , Simon Arlott CC: Guenter Roeck , "devicetree@vger.kernel.org" , Ralf Baechle , Thomas Gleixner , Jason Cooper , Marc Zyngier , Kevin Cernekee , Wim Van Sebroeck , Maxime Bizon , Linux Kernel Mailing List , MIPS Mailing List , linux-watchdog@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: Re: [PATCH 6/10] watchdog: bcm63xx_wdt: Obtain watchdog clock HZ from "periph" clk References: <5650BFD6.5030700@simon.arlott.org.uk> <5650C08C.6090300@simon.arlott.org.uk> <5650E2FA.6090408@roeck-us.net> <5650E5BB.6020404@simon.arlott.org.uk> <56512937.6030903@roeck-us.net> <5651CB13.4090704@simon.arlott.org.uk> <5651CC3C.5090200@simon.arlott.org.uk> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2129 Lines: 54 On 23/11/15 07:02, Jonas Gorski wrote: > Hi, > > On Sun, Nov 22, 2015 at 3:07 PM, Simon Arlott wrote: >> Instead of using a fixed clock HZ in the driver, obtain it from the >> "periph" clk that the watchdog timer uses. >> >> Signed-off-by: Simon Arlott >> --- >> drivers/watchdog/bcm63xx_wdt.c | 36 +++++++++++++++++++++++++++++++----- >> 1 file changed, 31 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/watchdog/bcm63xx_wdt.c b/drivers/watchdog/bcm63xx_wdt.c >> index 1d2a501..eb5e551 100644 >> --- a/drivers/watchdog/bcm63xx_wdt.c >> +++ b/drivers/watchdog/bcm63xx_wdt.c >> @@ -13,6 +13,7 @@ >> >> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt >> >> +#include >> #include >> #include >> #include >> @@ -32,11 +33,13 @@ >> >> #define PFX KBUILD_MODNAME >> >> -#define WDT_HZ 50000000 /* Fclk */ >> +#define WDT_CLK_NAME "periph" > > @Florian: > Is this correct? The comment for the watchdog in 6358_map_part.h and > earlier claims that the clock is 40 MHz there, but the code uses 50MHz > - is this a bug in the comments or is it a bug taken over from the > original broadcom code? I'm sure that the periph clock being 50 MHz > even on the older chips is correct, else we'd have noticed that in > serial output (where it's also used). There are references to a Fbus2 clock in documentation, but I could not find any actual documentation for its actual clock frequency, I would be surprised if this chip would have diverged from the previous and future ones and used a 40Mhz clock. 6345 started with a peripheral clock running at 50Mhz, and that is true for all chips since then AFAICT. I agree we would have noticed this with the UART or SPI controllers if that was not true, so probably a code glitch here... -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/