Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751510AbbKYRWe (ORCPT ); Wed, 25 Nov 2015 12:22:34 -0500 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:36269 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751191AbbKYRW1 (ORCPT ); Wed, 25 Nov 2015 12:22:27 -0500 Message-ID: <1448472141.3390.17.camel@pengutronix.de> Subject: Re: [RFC PATCH 1/2] drm: add support for for clk and de polarity From: Philipp Zabel To: Manfred Schlaegl Cc: David Airlie , Jean-Christophe Plagniol-Villard , Tomi Valkeinen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org, Manfred Schlaegl , Steve Longerbeam , Deepak Das , Jiada Wang , linux-fbdev@vger.kernel.org Date: Wed, 25 Nov 2015 18:22:21 +0100 In-Reply-To: <55A6813A.8090706@gmx.at> References: <55A67FDB.8010602@gmx.at> <55A6813A.8090706@gmx.at> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:100:96de:80ff:fec2:9969 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1671 Lines: 39 Am Mittwoch, den 15.07.2015, 17:50 +0200 schrieb Manfred Schlaegl: > To get full support for parallel and LVDS displays with drm: > Add representation for clock and data enable polarity in drm_display_mode > flags (similar to HSYNC/VSYNC polarity) and update conversion functions > from/to videomode accordingly. > > This is especially important for embedded devices where parallel(RGB) and > LVDS displays are still widely used and drm already plays an important > role. > > Tested on Freescale i.MX53(parallel) and i.MX6(LVDS). > > Background: > There was the ability to set polarity of clock and data enable signals > in devicetree(display-timing), struct display_timing and struct videomode, > but there was no representation for this in struct drm_display_mode. > Example on Freescale i.MX53/i.MX6 SoC's: > * A parallel display using different clock polarity is set up using > display-timing in devicetree > * ipuv3 parallel outputs clock with wrong polarity > > Signed-off-by: Manfred Schlaegl Any comments on whether data enable and pixel clock polarity flags can be added to the visible DRM_MODE_FLAGs, and if not, where else this information should be kept? struct drm_display_info? This patch and the following IPUv3 patch are useful and necessary for quite some panels connected to i.MX SoCs, but adding DRM_MODE_FLAGs is somewhat out of my jurisdiction. best regards Philipp -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/