Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751834AbbKZK0H (ORCPT ); Thu, 26 Nov 2015 05:26:07 -0500 Received: from smtp2-g21.free.fr ([212.27.42.2]:4535 "EHLO smtp2-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751119AbbKZK0F (ORCPT ); Thu, 26 Nov 2015 05:26:05 -0500 Subject: Re: [PATCH 2/2] irqchip: add support for Sigma Designs SMP86xx interrupt controller To: Mans Rullgard Cc: linux-kernel@vger.kernel.org, Thomas Gleixner , Jason Cooper , Marc Zyngier References: <1447958026-3015-1-git-send-email-mans@mansr.com> <1447958026-3015-3-git-send-email-mans@mansr.com> <56558E13.6030703@free.fr> <5655A537.3040707@free.fr> From: Mason Message-ID: <5656DE33.4040400@free.fr> Date: Thu, 26 Nov 2015 11:25:55 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:42.0) Gecko/20100101 Firefox/42.0 SeaMonkey/2.39 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1427 Lines: 45 On 25/11/2015 13:12, M?ns Rullg?rd wrote: > Mason writes: > >>> + status_lo = intc_readl(chip, chip->ctl + IRQ_STATUS); >>> + status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); >> >> In my local branch, I wrote: >> >> #define IRQ_CTL_LO 0 >> >> status_lo = intc_readl(chip, chip->ctl + IRQ_CTL_LO + IRQ_STATUS); >> status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); >> >> (I'm a sucker for symmetry) > > Nothing wrong with a little symmetry, though in this case I think the > extra macro only confuses matters. It's your call :-) In my mind, the fact that the status_lo register sits at offset 0 is just an accident. It's just that something has to sit at offset 0. (Maybe I should tell the HW guys to put nothing at offset 0, and start the actual register block at offset 4. /That/ would be unexpected.) Another way to look at it is: There are two 4-register blocks (LO and HI) each containing registers {status,rawstat,enableset,enableclr}. Block LO starts at offset 0x0 Block HI starts at offset 0x18 and then there are the intra offsets for the 4 registers in the block. There! I got the bike-shedding out of my system ;-) Regards. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/