From: Duan Andy <fugang.duan@freescale.com>
To: =?utf-8?B?TG90aGFyIFdhw59tYW5u?= <LW@KARO-electronics.de>,
        Andrew Lunn <andrew@lunn.ch>, "David S. Miller" <davem@davemloft.net>,
        Fabio Estevam <Fabio.Estevam@freescale.com>,
        Greg Ungerer <gerg@uclinux.org>, Kevin Hao <haokexin@gmail.com>,
        Lucas Stach <l.stach@pengutronix.de>,
        Philippe Reynes <tremyfr@gmail.com>,
        Richard Cochran <richardcochran@gmail.com>,
        Russell King <rmk+kernel@arm.linux.org.uk>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        "Stefan Agner" <stefan@agner.ch>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
        "Uwe Kleine-K?nig" <u.kleine-koenig@pengutronix.de>
Subject: RE: [PATCH 0/3] net: fec: Reset ethernet PHY whenever the enet_out
 clock
Thread-Topic: [PATCH 0/3] net: fec: Reset ethernet PHY whenever the enet_out
 clock
Thread-Index: AQHRK2LoJjXzOYpAHkS8F/Lf0Yrt9J61XXyw
Date: Tue, 1 Dec 2015 01:52:35 +0000
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References: <1448883168-30742-1-git-send-email-LW@KARO-electronics.de>
In-Reply-To: <1448883168-30742-1-git-send-email-LW@KARO-electronics.de>
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From: Lothar Waßmann <LW@KARO-electronics.de> Sent: Monday, November 30, 2015 7:33 PM
> To: Andrew Lunn; David S. Miller; Estevam Fabio-R49496; Greg Ungerer;
> Kevin Hao; Lothar Waßmann; Lucas Stach; Duan Fugang-B38611; Philippe
> Reynes; Richard Cochran; Russell King; Sascha Hauer; Stefan Agner; linux-
> kernel@vger.kernel.org; netdev@vger.kernel.org; Jeff Kirsher; Uwe Kleine-
> König
> Subject: [PATCH 0/3] net: fec: Reset ethernet PHY whenever the enet_out
> clock
> 
> This patchset fixes a regression introduced by commit 8fff755e9f8d ("net:
> fec: Ensure clocks are enabled while using mdio bus") for ethernet PHYs
> that are using ENET_OUT as reference clock (on i.MX6 or i.MX28)
> 
Do you mean commit 8fff755e9f8d cause your problem ?  This commit just manage ipg clock in runtime because mdio bus can access external phy switch no matter netdev status.

I don't think the commit cause phy link up/down issue.  Phy link up/down is due to phy is not ready after power/clock on, it need to do reset.


> The first patch is a cleanup patch that removes redundant NULL checks.
> The second patch converts the driver to use the 'gpiod' framework.
> The third patch makes sure, fec_reset_phy() is called whenever the
>     enet_out clock has been (re-)enabled to get the PHY into a
>     consistent state.
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