Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752420AbbLCVop (ORCPT ); Thu, 3 Dec 2015 16:44:45 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:34017 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752068AbbLCVoo (ORCPT ); Thu, 3 Dec 2015 16:44:44 -0500 MIME-Version: 1.0 In-Reply-To: <20151203201455.GB18534@tassilo.jf.intel.com> References: <1449172990-30183-1-git-send-email-eranian@google.com> <1449172990-30183-3-git-send-email-eranian@google.com> <20151203201455.GB18534@tassilo.jf.intel.com> Date: Thu, 3 Dec 2015 13:44:42 -0800 Message-ID: Subject: Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom From: Stephane Eranian To: Andi Kleen Cc: LKML , Arnaldo Carvalho de Melo , Peter Zijlstra , "mingo@elte.hu" , "Liang, Kan" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 758 Lines: 18 On Thu, Dec 3, 2015 at 12:14 PM, Andi Kleen wrote: > > > /* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */ > > INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01), > > + /* Allow all events as PEBS with no flags */ > > + INTEL_ALL_EVENT_CONSTRAINT(0, 0x1), > > I don't think this is really needed (no extra PEBS events), but ok it shouldn't > hurt either. > Has to do with consistent behavior. Do not get an error if trying PEBS on non-PEBS event, like for the other CPUs. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/