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Date: Fri, 4 Dec 2015 10:52:56 +0530
Message-ID: <CAKfKVtF8d5Q0eond4X1zctUbLS4XEnbRMYmoQjuVfHBXKQby1Q@mail.gmail.com>
Subject: Re: [PATCH 1/3] spi: spi-xilinx: Remove ISR race condition
From: Shubhrajyoti Datta <shubhrajyoti.datta@gmail.com>
To: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Cc: Mark Brown <broonie@kernel.org>, Michal Simek <michal.simek@xilinx.com>,
        linux-kernel@vger.kernel.org, Michal Simek <monstr@monstr.eu>,
        Peter Crosthwaite <pcrost@xilinx.com>,
        Peter Crosthwaite <peter.crosthwaite@petalogix.com>,
        Grant Likely <grant.likely@linaro.org>,
        spi-devel-general@lists.sourceforge.net,
        Thomas Gleixner <tglx@linutronix.de>
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>
>>
>> =============
>> spi: xilinx - minimize iomem reads
>>
>>     If this IP core is accessed through bridges like PCI-e, reads are rather
>>     costly. Doing many reads or read-modify-writes is thus long and strenuous
>>     on the CPU (active waiting).
>>
>>     The transfer workflow of this driver allows some assumptions to be made and
>>     exploited to minimize reads as much as possible.
>>
>>     These two assumptions are made:
>>     - since we are in control of the CR register, cache it so we don't have to
>>       read it all the time to modify it.
>
> Makes sense.

I have made an attempt at it can you check if you get any performance
improvemets
on your setup.

http://www.spinics.net/lists/linux-spi/msg05963.html


Thanks,
Shubhrajyoti
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