Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932803AbbLGTfL (ORCPT ); Mon, 7 Dec 2015 14:35:11 -0500 Received: from mail-io0-f178.google.com ([209.85.223.178]:35635 "EHLO mail-io0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932380AbbLGTfG (ORCPT ); Mon, 7 Dec 2015 14:35:06 -0500 MIME-Version: 1.0 In-Reply-To: <1449388004.2096.12.camel@hbabu-laptop> References: <1449388004.2096.12.camel@hbabu-laptop> From: Dan Streetman Date: Mon, 7 Dec 2015 14:34:26 -0500 X-Google-Sender-Auth: yb4tDK1e4oAqNz7UgUGMfIJVq1k Message-ID: Subject: Re: crypto/nx842: Ignore queue overflow informative error To: Haren Myneni Cc: Herbert Xu , "David S. Miller" , Michael Ellerman , pair@us.ibm.com, Linux Crypto Mailing List , linux-kernel , "linuxppc-dev@lists.ozlabs.org" , Haren Myneni Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2587 Lines: 65 On Sun, Dec 6, 2015 at 2:46 AM, Haren Myneni wrote: > > NX842 coprocessor sets bit 3 if queue is overflow. It is just for > information to the user. So the driver prints this informative message > and ignores it. > > Signed-off-by: Haren Myneni > > diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h > index 9f8402b..d1a2a2d 100644 > --- a/arch/powerpc/include/asm/icswx.h > +++ b/arch/powerpc/include/asm/icswx.h > @@ -164,6 +164,7 @@ struct coprocessor_request_block { > #define ICSWX_INITIATED (0x8) > #define ICSWX_BUSY (0x4) > #define ICSWX_REJECTED (0x2) > +#define ICSWX_BIT3 (0x1) /* undefined or set from XERSO. */ Since this isn't defined by the icswx rfc workbook, it probably shouldn't go here, it would make more sense to put it into nx-842.h and call it something like "ICSWX_NX_QUEUE_OVERFLOW" or similar NX-specific meaningful name. > > static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb) > { > diff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c > index 9ef51fa..321b8e8 100644 > --- a/drivers/crypto/nx/nx-842-powernv.c > +++ b/drivers/crypto/nx/nx-842-powernv.c > @@ -442,6 +442,15 @@ static int nx842_powernv_function(const unsigned char *in, unsigned int inlen, > (unsigned int)ccw, > (unsigned int)be32_to_cpu(crb->ccw)); > > + /* > + * NX842 coprocessor uses 3rd bit to report queue overflow which is > + * not an error, just for information to user. So, ignore this bit. > + */ a meaningfully named bit define means you don't need to explain it with a comment :-) However, I suggest that you do explain *why* a queue overflow isn't an error - either here or (probably better) at the #define of the bit - because that isn't obvious. > + if (ret & ICSWX_BIT3) { > + pr_info_ratelimited("842 coprocessor queue overflow\n"); if it's not an error, should this be pr_debug_ratelimited instead? What is an end user expected to do if they see this msg in the log? > + ret &= ~ICSWX_BIT3; > + } > + > switch (ret) { > case ICSWX_INITIATED: > ret = wait_for_csb(wmem, csb); > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/