Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756037AbbLHHx5 (ORCPT ); Tue, 8 Dec 2015 02:53:57 -0500 Received: from down.free-electrons.com ([37.187.137.238]:57623 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753218AbbLHHx4 (ORCPT ); Tue, 8 Dec 2015 02:53:56 -0500 Date: Tue, 8 Dec 2015 08:53:54 +0100 From: Maxime Ripard To: Jean-Francois Moine Cc: Rob Herring , devicetree@vger.kernel.org, Vishnu Patekar , Emilio =?iso-8859-1?Q?L=F3pez?= , Michael Turquette , Reinder de Haan , Stephen Boyd , linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Hans de Goede , Chen-Yu Tsai , Jens Kuske , Linus Walleij , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] clk: sunxi: Extend the simple gates and handle the Allwinner H3 Message-ID: <20151208075354.GJ27957@lukather> References: <20151206100412.1a74b71da8e9ca28c6e61589@free.fr> <20151207143102.GA29097@rob-hp-laptop> <20151208074226.17c75247f9eed69c9cac1d2d@free.fr> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="NgG1H2o5aFKkgPy/" Content-Disposition: inline In-Reply-To: <20151208074226.17c75247f9eed69c9cac1d2d@free.fr> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4311 Lines: 110 --NgG1H2o5aFKkgPy/ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Jean-Francois, On Tue, Dec 08, 2015 at 07:42:26AM +0100, Jean-Francois Moine wrote: > On Mon, 7 Dec 2015 08:31:02 -0600 > Rob Herring wrote: >=20 > > On Sun, Dec 06, 2015 at 10:04:12AM +0100, Jean-Francois Moine wrote: > > > The H3 has a clock gate definition similar to the other Allwinner SoC= s, > > > but with a different parent clock for each single gate. > > >=20 > > > Adding the names of the parent clocks in both the source and output c= locks > > > permits the use of the simple-gates driver to define the bus gates > > > of all known Allwinner SoCs. > > >=20 > > > Signed-off-by: Jean-Francois Moine > > > --- > > > This patch replaces a part of Jens Kuske's patch > > > [PATCH v5 1/4] clk: sunxi: Add H3 clocks support > > > --- > > > Documentation/devicetree/bindings/clock/sunxi.txt | 25 +++++++++++++= ++++++++++ > > > drivers/clk/sunxi/clk-simple-gates.c | 14 ++++++++++++- > > > 2 files changed, 38 insertions(+), 1 deletion(-) > > >=20 > > > diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Docu= mentation/devicetree/bindings/clock/sunxi.txt > > > index 8a47b77..5736e6d 100644 > > > --- a/Documentation/devicetree/bindings/clock/sunxi.txt > > > +++ b/Documentation/devicetree/bindings/clock/sunxi.txt > > > @@ -70,6 +70,7 @@ Required properties: > > > "allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23 > > > "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 > > > "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A= 80 > > > + "allwinner,sunxi-gates-clk" - simple gates > > > =20 > > > Required properties for all clocks: > > > - reg : shall be the control register address for the clock. > > > @@ -93,6 +94,12 @@ The "allwinner,sun9i-a80-mmc-config-clk" clock als= o requires: > > > - #reset-cells : shall be set to 1 > > > - resets : shall be the reset control phandle for the mmc block. > > > =20 > > > +The "allwinner,sunxi-gates-clk" clock also requires: > > > +- clock-names : corresponding names of the parent clocks > > > +when the output clocks have different parents. > > > +These names must be 4 characters long and must appear as a prefix in > > > +the names of the output clocks. See example. > > > + > >=20 > > I don't think you should be encoding relationships of clocks using the= =20 > > name strings. We describe relationships in DT via parent/child or=20 > > phandles. >=20 > As you know, in the H3, each of the 49 output clock has one of the 4 > main clocks as its source. > There are 3 options for defining the source of each clock: > 1- all definitions are in the DT, > 2- some definitions are in the DT, some other ones are hard-coded, > 3- all definitions are hard-coded. Look, we all agreed on a solution that raised all objections, but yours. I'm going to take Jens patch. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --NgG1H2o5aFKkgPy/ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWZoyRAAoJEBx+YmzsjxAgp8sP/jEaoG3OcDNzxmRwAQQJvca+ H2pjLO1YkjpjbZ8kLH3fJpTI2nLv6WEXtxM+QNVUBTdM0lcCd7BU4Q10ZvB8A/JG JvBUt4jQ8qBBQZjsF+rRzG2HThz9JyGYJaR0aeAtJy8yhkJmu6uMyBVf38h4AvuH xTyobm6+fdF5wdgVMLE2mcTJi0yGEt/p3v6PLg3kKTI1ANA80CpkFv4/cNQgCbqv Ju1GiJyxQLbTt+auREMIBfu++qi65UDZaGkC4PaO/SkgFr1uRzlbaz5SBtY4+kTk yL6NJrFFyT6QXVnoDWV71hC63CklVM4DNrIBLfnJyOr+/fYFI21bxQoHmTWZZJDl 2G3CIZM+Oe0hx3VtQz1hgIdvKherqy4bDuCJI05iLnWExWzlGPpBlf+s2sbaC1bV wz1Bgkp1ZRRVIY5vpUJz4OCUQV8FO9wcyrryfCd/IwVb5It+bxQcNa4k0eCiBT+O 0eYqeup5FDGlX8XKjHEJ6DWxt5Qj88dgz+YTDfq0+/YeeU8Thxql+VnOZiyf3isO N3thA76G67EtrqnimPla2H8ISvcBUswtpgNmQTn3S7sT8f7NYC0cdLaD9A/EnNvC zEchw2B9jK1lO1oBqKDreWgVMv38oB06354hY5GoKAACij0fErhldUBJxNpNaoaK bbflxU/GUublvbQVlOtI =6aGD -----END PGP SIGNATURE----- --NgG1H2o5aFKkgPy/-- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/