Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753196AbbLIEwi (ORCPT ); Tue, 8 Dec 2015 23:52:38 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:31019 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751919AbbLIEwg (ORCPT ); Tue, 8 Dec 2015 23:52:36 -0500 X-AuditID: cbfec7f4-f79026d00000418a-c1-5667b3924e74 Subject: Re: [PATCH 2/2] ARM: dts: exynos542x: add GSCL block parent clock management to pm domain To: Marek Szyprowski , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <1449582415-30164-1-git-send-email-m.szyprowski@samsung.com> <1449582415-30164-2-git-send-email-m.szyprowski@samsung.com> Cc: Sylwester Nawrocki , Tomasz Figa , Mike Turquette , Kukjin Kim From: Krzysztof Kozlowski Message-id: <5667B38E.5020207@samsung.com> Date: Wed, 09 Dec 2015 13:52:30 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1449582415-30164-2-git-send-email-m.szyprowski@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDLMWRmVeSWpSXmKPExsVy+t/xa7qTNqeHGbzYa2rx+oWhRf/j18wW l3fNYbOYcX4fk8XaI3fZLS6ecrU4/Kad1WLVrj+MDhwe72+0snvsnHWX3WPTqk42j74tqxg9 Pm+SC2CN4rJJSc3JLEst0rdL4Mo4PJerYApHxebzDawNjPfZuhg5OSQETCQ+fDnFDGGLSVy4 tx4ozsUhJLCUUWJjcy+U85RRYv23e4wgVcICKRJrV+5mBbFFBIokZm/+xAxR1M4o8fDCPhYQ h1lgIaPErxX3WECq2ASMJTYvXwK2j1dAS2LH+X6mLkYODhYBVYnet1kgpqhAhMSiHZkQFYIS PyZDdHIKeEp82H2OGaSEWUBP4v5FLZAws4C8xOY1b5knMArMQtIxC6FqFpKqBYzMqxhFU0uT C4qT0nMN9YoTc4tL89L1kvNzNzFCwvzLDsbFx6wOMQpwMCrx8F5wSQ8TYk0sK67MPcQowcGs JMKrVQsU4k1JrKxKLcqPLyrNSS0+xCjNwaIkzjt31/sQIYH0xJLU7NTUgtQimCwTB6dUA+Pm U0wRZ1wfMJ4z3XrkuNsc89jFKksPn5BM101LO/5coe3E05LoEz2rlrVbX2rOv3dWsOLgtGqD zWdaL/XNUr0j5LxZc5+uy4LGZJmunT2c3A+OTu16NFElxq2QiZlt628GTl3ef7JlvpVs1a/X H19uwOjNrnyt0VUh3sIwQfNa1Z/1FTZbZiqxFGckGmoxFxUnAgCTEPXobwIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1260 Lines: 34 On 08.12.2015 22:46, Marek Szyprowski wrote: > Add support for restoring GScaler parent clocks configuration when GSCL > power domain is turned on. > > Signed-off-by: Marek Szyprowski > --- > arch/arm/boot/dts/exynos5420.dtsi | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index 48a0a55..912143e 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -252,8 +252,10 @@ > compatible = "samsung,exynos4210-pd"; > reg = <0x10044000 0x20>; > #power-domain-cells = <0>; > - clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; > - clock-names = "asb0", "asb1"; > + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK300_GSCL>, > + <&clock CLK_MOUT_USER_ACLK300_GSCL>, <&clock CLK_GSCL0>, > + <&clock CLK_GSCL1>; > + clock-names = "oscclk", "pclk0", "clk0", "asb0", "asb1"; The pclkN name is not used. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/