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Date: Tue, 20 Feb 2001 21:52:16 +0100
From: Pavel Machek <pavel@suse.cz>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Pavel Machek <pavel@suse.cz>, Manfred Spraul <manfred@colorfullife.com>,
        Linus Torvalds <torvalds@transmeta.com>, linux-kernel@vger.kernel.org
Subject: Re: [beta patch] SSE copy_page() / clear_page()
Message-ID: <20010220215216.C17159@atrey.karlin.mff.cuni.cz>
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> > > +		__asm__ __volatile__(
> > > +			"mov %1, %0\n\t"
> > > +			: "=r" (i)
> > > +			: "r" (kaddr+offset)); /* load tlb entry */
> > > +		for(i=0;i<size;i+=64) {
> > > +			__asm__ __volatile__(
> > > +				"prefetchnta (%1, %0)\n\t"
> > > +				"prefetchnta 32(%1, %0)\n\t"
> > > +				: /* no output */
> > > +				: "r" (i), "r" (kaddr+offset));
> > > +		}
> > > +	}
> > >  	left = __copy_to_user(desc->buf, kaddr + offset, size);
> > >  	kunmap(page);
> > 
> > This seems bogus -- you need to handle faults --
> > i.e. __prefetchnta_to_user() ;-).
> 
> It wants wrapping nicely. A generic prefetch and prefetchw does help some other
> cases (scheduler for one).
> 
> Does the prefetch instruction fault on PIII/PIV then - the K7 one appears not
> to be a source of faults

My fault. I was told that prefetch instructions are always
non-faulting.

				Pavel

-- 
The best software in life is free (not shareware)!		Pavel
GCM d? s-: !g p?:+ au- a--@ w+ v- C++@ UL+++ L++ N++ E++ W--- M- Y- R+
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