Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753390AbbLNSSa (ORCPT ); Mon, 14 Dec 2015 13:18:30 -0500 Received: from mail-wm0-f47.google.com ([74.125.82.47]:32922 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752528AbbLNSS0 (ORCPT ); Mon, 14 Dec 2015 13:18:26 -0500 From: Matthias Brugger To: Tiffany Lin Cc: daniel.thompson@linaro.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Mauro Carvalho Chehab , Daniel Kurtz , Hans Verkuil , Laurent Pinchart , Sakari Ailus , Mikhail Ulyanov , Fabien Dessenne , Arnd Bergmann , Darren Etheridge , Peter Griffin , Benoit Parrot , Andrew-CT Chen , Eddie Huang , Yingjoe Chen , James Liao , Hongzhou Yang , Daniel Hsiao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org, PoChun.Lin@mediatek.com Subject: Re: [PATCH v2 5/8] arm64: dts: mediatek: Add Video Encoder for MT8173 Date: Mon, 14 Dec 2015 19:18:17 +0100 Message-ID: <1598527.2ooU1eBZYB@linux-gy6r.site> User-Agent: KMail/4.14.10 (Linux/4.1.13-5-default; KDE/4.14.10; x86_64; ; ) In-Reply-To: <1449827743-22895-6-git-send-email-tiffany.lin@mediatek.com> References: <1449827743-22895-1-git-send-email-tiffany.lin@mediatek.com> <1449827743-22895-6-git-send-email-tiffany.lin@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3116 Lines: 79 On Friday 11 Dec 2015 17:55:40 Tiffany Lin wrote: > Add video encoder node for MT8173 > > Signed-off-by: Tiffany Lin > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 47 > ++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index b8c8ff0..a6b0fcf 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -545,6 +545,53 @@ > #clock-cells = <1>; > }; > > + larb3: larb@18001000 { > + compatible = "mediatek,mt8173-smi-larb"; > + reg = <0 0x18001000 0 0x1000>; > + mediatek,smi = <&smi_common>; > + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; > + clocks = <&vencsys CLK_VENC_CKE1>, > + <&vencsys CLK_VENC_CKE0>; > + clock-names = "apb", "smi"; > + }; > + > + vcodec_enc: vcodec@18002000 { > + compatible = "mediatek,mt8173-vcodec-enc"; > + reg = <0 0x18002000 0 0x1000>, /* VENC_SYS */ > + <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */ > + interrupts = , > + ; > + larb = <&larb3>, > + <&larb5>; should be mediatek,larb or just larb for all instances of the larb's. See my other email about the bindings. Regards, Matthias > + iommus = <&iommu M4U_LARB3_ID M4U_PORT_VENC_RCPU>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REC>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_BSDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_SV_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_RD_COMV>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_CUR_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_LUMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_REF_CHROMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_RDMA>, > + <&iommu M4U_LARB3_ID M4U_PORT_VENC_NBM_WDMA>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RCPU_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_FRM_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_BSDMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_SV_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_RD_COMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_CUR_CHROMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REF_LUMA_SET2>, > + <&iommu M4U_LARB5_ID M4U_PORT_VENC_REC_CHROMA_SET2>; > + vpu = <&vpu>; > + clocks = <&apmixedsys CLK_APMIXED_VENCPLL>, > + <&topckgen CLK_TOP_VENC_LT_SEL>, > + <&topckgen CLK_TOP_VCODECPLL_370P5>; > + clock-names = "vencpll", > + "venc_lt_sel", > + "vcodecpll_370p5_ck"; > + }; > + > vencltsys: clock-controller@19000000 { > compatible = "mediatek,mt8173-vencltsys", "syscon"; > reg = <0 0x19000000 0 0x1000>; -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/