Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932890AbbLNWmj (ORCPT ); Mon, 14 Dec 2015 17:42:39 -0500 Received: from exsmtp03.microchip.com ([198.175.253.49]:43776 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932725AbbLNWiI (ORCPT ); Mon, 14 Dec 2015 17:38:08 -0500 From: Joshua Henderson To: CC: , , Cristian Birsan , Joshua Henderson , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Subject: [PATCH v2 01/14] DEVICETREE: Add bindings for PIC32 interrupt controller Date: Mon, 14 Dec 2015 15:42:03 -0700 Message-ID: <1450133093-7053-2-git-send-email-joshua.henderson@microchip.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1450133093-7053-1-git-send-email-joshua.henderson@microchip.com> References: <1450133093-7053-1-git-send-email-joshua.henderson@microchip.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2827 Lines: 85 From: Cristian Birsan Document the devicetree bindings for the interrupt controller on Microchip PIC32 class devices. Signed-off-by: Cristian Birsan Signed-off-by: Joshua Henderson Cc: Ralf Baechle --- .../interrupt-controller/microchip,pic32-evic.txt | 58 ++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt new file mode 100644 index 0000000..6f4389a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt @@ -0,0 +1,58 @@ +Microchip PIC32 Interrupt Controller +==================================== + +The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller +(EVIC). It handles internal and external interrupts and provides support for +irq type and polarity. + +Required properties +------------------- + +- compatible: Should be "microchip,pic32mzda-evic" + +- reg: Specifies physical base address and size of register range. + +- interrupt-controller: Identifies the node as an interrupt controller. + +- #interrupt cells: Specifies the number of cells used to encode an interrupt +source connected to this controller. The value shall be 2 and interrupt +descriptor shall have the following format: + + +hw_irq - represents the hardware interrupt number as in the data sheet. + +irq_type - is used to describe the type and polarity of an interrupt. For +internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and +IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use +IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity. + +Example +------- + +evic: interrupt-controller@1f810000 { + compatible = "microchip,pic32mzda-evic"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1f810000 0x1000>; +}; + +Each device must request his interrupt line with the associated priority and +polarity + +Internal interrupt DTS snippet +------------------------------ + +device@1f800000 { + ... + interrupts = <113 IRQ_TYPE_LEVEL_HIGH>; + ... +}; + +External interrupt DTS snippet +------------------------------ + +device@1f800000 { + ... + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + ... +}; -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/