Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751595AbbLOFYI (ORCPT ); Tue, 15 Dec 2015 00:24:08 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:33483 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750833AbbLOFYG (ORCPT ); Tue, 15 Dec 2015 00:24:06 -0500 Date: Mon, 14 Dec 2015 20:22:47 -0500 From: Sanidhya Solanki To: Greg KH Cc: devel@driverdev.osuosl.org, driverdev-devel@linuxdriverproject.org, linux-kernel@vger.kernel.org, Dan Carpenter Subject: Re: [PATCH FIXED 1/3] staging: dgnc: Patch includes the checkpatch fixes Message-ID: <20151214202247.05593fb9@gmail.com> In-Reply-To: <20151215052153.GA30050@kroah.com> References: <20151211032149.489d90d1@gmail.com> <20151211130233.GJ5284@mwanda> <20151211212416.6238df0d@gmail.com> <20151212085744.GO5284@mwanda> <20151212025850.47738101@gmail.com> <20151214191451.GA30170@kroah.com> <20151214190331.6600da75@gmail.com> <20151215043439.GB28216@kroah.com> <20151214194525.1fd26717@gmail.com> <20151215052153.GA30050@kroah.com> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 38571 Lines: 1009 Patch contains the spacing fixes that checkpatch prompted for, as asked by the TODO. Signed-off-by: Sanidhya Solanki --- drivers/staging/dgnc/dgnc_cls.c | 4 +- drivers/staging/dgnc/dgnc_driver.h | 8 -- drivers/staging/dgnc/dgnc_neo.c | 235 ++++++++++++++++++++++++------------- drivers/staging/dgnc/dgnc_neo.h | 22 ++-- drivers/staging/dgnc/dgnc_pci.h | 1 - drivers/staging/dgnc/dgnc_sysfs.c | 18 ++- drivers/staging/dgnc/dgnc_tty.c | 46 +++++--- drivers/staging/dgnc/digi.h | 32 ++--- 8 files changed, 223 insertions(+), 143 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_cls.c b/drivers/staging/dgnc/dgnc_cls.c index 75040da..d312d35 100644 --- a/drivers/staging/dgnc/dgnc_cls.c +++ b/drivers/staging/dgnc/dgnc_cls.c @@ -1168,8 +1168,8 @@ static void cls_uart_init(struct channel_t *ch) /* Clear out UART and FIFO */ readb(&ch->ch_cls_uart->txrx); - writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), - &ch->ch_cls_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | + UART_FCR_CLEAR_XMIT), &ch->ch_cls_uart->isr_fcr); udelay(10); ch->ch_flags |= (CH_FIFO_ENABLED | CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); diff --git a/drivers/staging/dgnc/dgnc_driver.h b/drivers/staging/dgnc/dgnc_driver.h index ce7cd9b..e4be81b 100644 --- a/drivers/staging/dgnc/dgnc_driver.h +++ b/drivers/staging/dgnc/dgnc_driver.h @@ -88,7 +88,6 @@ #define _POSIX_VDISABLE '\0' #endif - /* * All the possible states the driver can be while being loaded. */ @@ -106,7 +105,6 @@ enum { BOARD_READY }; - /************************************************************************* * * Structures and closely related defines. @@ -145,7 +143,6 @@ struct board_ops { ************************************************************************/ #define BD_IS_PCI_EXPRESS 0x0001 /* Is a PCI Express board */ - /* * Per-board information */ @@ -241,7 +238,6 @@ struct dgnc_board { }; - /************************************************************************ * Unit flag definitions for un_flags. ************************************************************************/ @@ -277,7 +273,6 @@ struct un_t { struct device *un_sysfs; }; - /************************************************************************ * Device flag definitions for ch_flags. ************************************************************************/ @@ -300,7 +295,6 @@ struct un_t { #define CH_FORCED_STOP 0x20000 /* Output is forcibly stopped */ #define CH_FORCED_STOPI 0x40000 /* Input is forcibly stopped */ - /* Our Read/Error/Write queue sizes */ #define RQUEUEMASK 0x1FFF /* 8 K - 1 */ #define EQUEUEMASK 0x1FFF /* 8 K - 1 */ @@ -309,7 +303,6 @@ struct un_t { #define EQUEUESIZE RQUEUESIZE #define WQUEUESIZE (WQUEUEMASK + 1) - /************************************************************************ * Channel information structure. ************************************************************************/ @@ -397,7 +390,6 @@ struct channel_t { ulong ch_intr_tx; /* Count of interrupts */ ulong ch_intr_rx; /* Count of interrupts */ - /* /proc// entries */ struct proc_dir_entry *proc_entry_pointer; struct dgnc_proc_entry *dgnc_channel_table; diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index 8106f52..2b94b75 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -77,7 +77,8 @@ struct board_ops dgnc_neo_ops = { .send_immediate_char = neo_send_immediate_char }; -static uint dgnc_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; +static uint dgnc_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, + 0x10, 0x20, 0x40, 0x80 }; /* * This function allows calls to ensure that all outstanding @@ -109,14 +110,17 @@ static inline void neo_set_cts_flow_control(struct channel_t *ch) /* Turn off auto Xon flow control */ efr &= ~UART_17158_EFR_IXON; - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), + &ch->ch_neo_uart->fctr); /* Feed the UART our trigger levels */ writeb(8, &ch->ch_neo_uart->tfifo); @@ -144,13 +148,16 @@ static inline void neo_set_rts_flow_control(struct channel_t *ch) ier &= ~UART_17158_IER_XOFF; efr &= ~UART_17158_EFR_IXOFF; - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 4; writeb(32, &ch->ch_neo_uart->rfifo); @@ -181,13 +188,16 @@ static inline void neo_set_ixon_flow_control(struct channel_t *ch) /* Turn on auto Xon flow control */ efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXON); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 4; writeb(32, &ch->ch_neo_uart->rfifo); @@ -218,14 +228,17 @@ static inline void neo_set_ixoff_flow_control(struct channel_t *ch) ier |= UART_17158_IER_XOFF; efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXOFF); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); writeb(8, &ch->ch_neo_uart->tfifo); ch->ch_t_tlevel = 8; @@ -258,14 +271,17 @@ static inline void neo_set_no_input_flow_control(struct channel_t *ch) else efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXOFF); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 0; @@ -295,14 +311,17 @@ static inline void neo_set_no_output_flow_control(struct channel_t *ch) else efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXON); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* Why? Becuz Exar's spec says we have to + * zero it out before setting it. + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 0; @@ -321,7 +340,8 @@ static inline void neo_set_no_output_flow_control(struct channel_t *ch) static inline void neo_set_new_start_stop_chars(struct channel_t *ch) { /* if hardware flow control is set, then skip this whole thing */ - if (ch->ch_digi.digi_flags & (CTSPACE | RTSPACE) || ch->ch_c_cflag & CRTSCTS) + if (ch->ch_digi.digi_flags & (CTSPACE | RTSPACE) || + ch->ch_c_cflag & CRTSCTS) return; /* Tell UART what start/stop chars it should be looking for */ @@ -352,7 +372,7 @@ static inline void neo_clear_break(struct channel_t *ch, int force) /* Turn break off, and unset some variables */ if (ch->ch_flags & CH_BREAK_SENDING) { if (time_after_eq(jiffies, ch->ch_stop_sending_break) - || force) { + || force) { unsigned char temp = readb(&ch->ch_neo_uart->lcr); writeb((temp & ~UART_LCR_SBC), &ch->ch_neo_uart->lcr); @@ -393,7 +413,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) break; /* - * Yank off the upper 2 bits, which just show that the FIFO's are enabled. + * Yank off the upper 2 bits, which just show + * that the FIFO's are enabled. */ isr &= ~(UART_17158_IIR_FIFO_ENABLED); @@ -403,7 +424,9 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) ch->ch_intr_rx++; neo_copy_data_from_uart_to_queue(ch); - /* Call our tty layer to enforce queue flow control if needed. */ + /* Call our tty layer to enforce queue + * flow control if needed. + */ spin_lock_irqsave(&ch->ch_lock, flags); dgnc_check_queue_flow_control(ch); spin_unlock_irqrestore(&ch->ch_lock, flags); @@ -428,7 +451,7 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) * one it was, so we can suspend or resume data flow. */ if (cause == UART_17158_XON_DETECT) { - /* Is output stopped right now, if so, resume it */ + /* Is output stopped right now, if so, resume it */ if (brd->channels[port]->ch_flags & CH_STOP) { spin_lock_irqsave(&ch->ch_lock, flags); @@ -437,7 +460,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) flags); } } else if (cause == UART_17158_XOFF_DETECT) { - if (!(brd->channels[port]->ch_flags & CH_STOP)) { + if (!(brd->channels[port]->ch_flags & + CH_STOP)) { spin_lock_irqsave(&ch->ch_lock, flags); ch->ch_flags |= CH_STOP; @@ -449,8 +473,9 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) if (isr & UART_17158_IIR_HWFLOW_STATE_CHANGE) { /* - * If we get here, this means the hardware is doing auto flow control. - * Check to see whether RTS/DTR or CTS/DSR caused this interrupt. + * If we get here, this means the hardware is + * doing auto flow control. Check to see whether + * RTS/DTR or CTS/DSR caused this interrupt. */ brd->intr_modem++; ch->ch_intr_modem++; @@ -542,10 +567,11 @@ static inline void neo_parse_lsr(struct dgnc_board *brd, uint port) if (linestatus & UART_LSR_OE) { /* - * Rx Oruns. Exar says that an orun will NOT corrupt - * the FIFO. It will just replace the holding register - * with this new data byte. So basically just ignore this. - * Probably we should eventually have an orun stat in our driver... + * Rx Oruns. Exar says that an orun will NOT + * corrupt the FIFO. It will just replace the + * holding register with this new data byte. + * So basically just ignore this. Probably we + * should eventually have an orun stat in our driver. */ ch->ch_err_overrun++; } @@ -665,8 +691,11 @@ static void neo_param(struct tty_struct *tty) 4800, 9600, 19200, 38400 } }; - /* Only use the TXPrint baud rate if the terminal unit is NOT open */ - if (!(ch->ch_tun.un_flags & UN_ISOPEN) && (un->un_type == DGNC_PRINT)) + /* Only use the TXPrint baud rate if the + * terminal unit is NOT open. + */ + if (!(ch->ch_tun.un_flags & UN_ISOPEN) && + (un->un_type == DGNC_PRINT)) baud = C_BAUD(ch->ch_pun.un_tty) & 0xff; else baud = C_BAUD(ch->ch_tun.un_tty) & 0xff; @@ -679,7 +708,8 @@ static void neo_param(struct tty_struct *tty) jindex = baud; - if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) && (jindex < 16)) + if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) + && (jindex < 16)) baud = bauds[iindex][jindex]; else baud = 0; @@ -763,8 +793,9 @@ static void neo_param(struct tty_struct *tty) ier &= ~(UART_IER_RDI | UART_IER_RLSI); /* - * Have the UART interrupt on modem signal changes ONLY when - * we are in hardware flow control mode, or CLOCAL/FORCEDCD is not set. + * Have the UART interrupt on modem signal changes + * ONLY when we are in hardware flow control mode, + * or CLOCAL/FORCEDCD is not set. */ if ((ch->ch_digi.digi_flags & CTSPACE) || (ch->ch_digi.digi_flags & RTSPACE) || @@ -786,8 +817,11 @@ static void neo_param(struct tty_struct *tty) if (ch->ch_digi.digi_flags & CTSPACE || ch->ch_c_cflag & CRTSCTS) { neo_set_cts_flow_control(ch); } else if (ch->ch_c_iflag & IXON) { - /* If start/stop is set to disable, then we should disable flow control */ - if ((ch->ch_startc == _POSIX_VDISABLE) || (ch->ch_stopc == _POSIX_VDISABLE)) + /* If start/stop is set to disable, then we + * should disable flow control. + */ + if ((ch->ch_startc == _POSIX_VDISABLE) || + (ch->ch_stopc == _POSIX_VDISABLE)) neo_set_no_output_flow_control(ch); else neo_set_ixon_flow_control(ch); @@ -798,8 +832,11 @@ static void neo_param(struct tty_struct *tty) if (ch->ch_digi.digi_flags & RTSPACE || ch->ch_c_cflag & CRTSCTS) { neo_set_rts_flow_control(ch); } else if (ch->ch_c_iflag & IXOFF) { - /* If start/stop is set to disable, then we should disable flow control */ - if ((ch->ch_startc == _POSIX_VDISABLE) || (ch->ch_stopc == _POSIX_VDISABLE)) + /* If start/stop is set to disable, then we should + * disable flow control. + */ + if ((ch->ch_startc == _POSIX_VDISABLE) || + (ch->ch_stopc == _POSIX_VDISABLE)) neo_set_no_input_flow_control(ch); else neo_set_ixoff_flow_control(ch); @@ -808,9 +845,10 @@ static void neo_param(struct tty_struct *tty) } /* - * Adjust the RX FIFO Trigger level if baud is less than 9600. - * Not exactly elegant, but this is needed because of the Exar chip's - * delay on firing off the RX FIFO interrupt on slower baud rates. + * Adjust the RX FIFO Trigger level if baud is less + * than 9600. Not exactly elegant, but this is needed + * because of the Exar chip's delay on firing off the + * RX FIFO interrupt on slower baud rates. */ if (baud < 9600) { writeb(1, &ch->ch_neo_uart->rfifo); @@ -845,13 +883,14 @@ static void neo_tasklet(unsigned long data) spin_unlock_irqrestore(&bd->bd_lock, flags); /* - * Do NOT allow the interrupt routine to read the intr registers - * Until we release this lock. + * Do NOT allow the interrupt routine to read the + * intr registers. Until we release this lock. */ spin_lock_irqsave(&bd->bd_intr_lock, flags); /* - * If board is ready, parse deeper to see if there is anything to do. + * If board is ready, parse deeper to see if there is + * anything to do. */ if ((state == BOARD_READY) && (ports > 0)) { /* Loop on each port */ @@ -938,14 +977,17 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) /* * If 0, no interrupts pending. - * This can happen if the IRQ is shared among a couple Neo/Classic boards. + * This can happen if the IRQ is shared among a couple + * Neo/Classic boards. */ if (!uart_poll) { spin_unlock_irqrestore(&brd->bd_intr_lock, flags); return IRQ_NONE; } - /* At this point, we have at least SOMETHING to service, dig further... */ + /* At this point, we have at least SOMETHING to service, + * dig further... + */ current_port = 0; @@ -967,7 +1009,7 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) uart_poll &= ~(dgnc_offset_table[port]); if (!type) { - /* If no type, just ignore it, and move onto next port */ + /* If no type, just ignore it, and move onto next port */ continue; } @@ -986,7 +1028,9 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) ch = brd->channels[port]; neo_copy_data_from_uart_to_queue(ch); - /* Call our tty layer to enforce queue flow control if needed. */ + /* Call our tty layer to enforce queue flow + * control if needed. + */ spin_lock_irqsave(&ch->ch_lock, flags2); dgnc_check_queue_flow_control(ch); spin_unlock_irqrestore(&ch->ch_lock, flags2); @@ -1002,16 +1046,18 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) case UART_17158_TXRDY: /* - * TXRDY interrupt clears after reading ISR register for the UART channel. + * TXRDY interrupt clears after reading ISR + * register for the UART channel. */ /* * Yes, this is odd... - * Why would I check EVERY possibility of type of - * interrupt, when we know its TXRDY??? - * Becuz for some reason, even tho we got triggered for TXRDY, - * it seems to be occasionally wrong. Instead of TX, which - * it should be, I was getting things like RXDY too. Weird. + * Why would I check EVERY possibility of type + * of interrupt, when we know its TXRDY??? + * Becuz for some reason, even tho we got triggered + * for TXRDY, it seems to be occasionally wrong. + * Instead of TX, which it should be, I was getting + * things like RXDY too. Weird. */ neo_parse_isr(brd, port); continue; @@ -1026,9 +1072,9 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) default: /* * The UART triggered us with a bogus interrupt type. - * It appears the Exar chip, when REALLY bogged down, will throw - * these once and awhile. - * Its harmless, just ignore it and move on. + * It appears the Exar chip, when REALLY bogged down, + * will throw these once and awhile. Its harmless, + * just ignore it and move on. */ continue; } @@ -1172,7 +1218,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) linestatus = 0; /* Copy data from uart to the queue */ - memcpy_fromio(ch->ch_rqueue + head, &ch->ch_neo_uart->txrxburst, n); + memcpy_fromio(ch->ch_rqueue + head, + &ch->ch_neo_uart->txrxburst, n); /* * Since RX_FIFO_DATA_ERROR was 0, we are guaranteed @@ -1225,7 +1272,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) * we don't miss our TX FIFO emptys. */ if (linestatus & (UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR)) { - linestatus &= ~(UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR); + linestatus &= ~(UART_LSR_THRE | + UART_17158_TX_AND_FIFO_CLR); ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); } @@ -1236,17 +1284,19 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) unsigned char discard; linestatus = 0; - memcpy_fromio(&discard, &ch->ch_neo_uart->txrxburst, 1); + memcpy_fromio(&discard, + &ch->ch_neo_uart->txrxburst, 1); continue; } /* - * If our queue is full, we have no choice but to drop some data. - * The assumption is that HWFLOW or SWFLOW should have stopped - * things way way before we got to this point. + * If our queue is full, we have no choice but to + * drop some data. The assumption is that HWFLOW + * or SWFLOW should have stopped things way way + * before we got to this point. * - * I decided that I wanted to ditch the oldest data first, - * I hope thats okay with everyone? Yes? Good. + * I decided that I wanted to ditch the oldest data + * first, I hope thats okay with everyone? Yes? Good. */ while (qleft < 1) { tail = (tail + 1) & RQUEUEMASK; @@ -1255,7 +1305,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) qleft++; } - memcpy_fromio(ch->ch_rqueue + head, &ch->ch_neo_uart->txrxburst, 1); + memcpy_fromio(ch->ch_rqueue + head, + &ch->ch_neo_uart->txrxburst, 1); ch->ch_equeue[head] = (unsigned char)linestatus; /* Ditch any remaining linestatus value. */ @@ -1309,7 +1360,8 @@ static int neo_drain(struct tty_struct *tty, uint seconds) * * NOTE: TODO: Do something with time passed in. */ - rc = wait_event_interruptible(un->un_flags_wait, ((un->un_flags & UN_EMPTY) == 0)); + rc = wait_event_interruptible(un->un_flags_wait, + ((un->un_flags & UN_EMPTY) == 0)); /* If ret is non-zero, user ctrl-c'ed us */ return rc; @@ -1328,11 +1380,14 @@ static void neo_flush_uart_write(struct channel_t *ch) if (!ch || ch->magic != DGNC_CHANNEL_MAGIC) return; - writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), + &ch->ch_neo_uart->isr_fcr); neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* Check to see if the UART feels it completely + * flushed the FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) udelay(10); @@ -1356,11 +1411,14 @@ static void neo_flush_uart_read(struct channel_t *ch) if (!ch || ch->magic != DGNC_CHANNEL_MAGIC) return; - writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR), + &ch->ch_neo_uart->isr_fcr); neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* Check to see if the UART feels it completely + * flushed the FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) udelay(10); @@ -1405,8 +1463,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_cached_lsr &= ~(UART_LSR_THRE); /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * If RTS Toggle mode is on, turn on RTS now if + * not already set, and make sure we get an event + * when the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1416,8 +1475,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * If DTR Toggle mode is on, turn on DTR now if not + * already set, and make sure we get an event when + * the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1427,7 +1487,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } - writeb(ch->ch_wqueue[ch->ch_w_tail], &ch->ch_neo_uart->txrx); + writeb(ch->ch_wqueue[ch->ch_w_tail], + &ch->ch_neo_uart->txrx); ch->ch_w_tail++; ch->ch_w_tail &= WQUEUEMASK; ch->ch_txcount++; @@ -1471,8 +1532,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) break; /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * If RTS Toggle mode is on, turn on RTS now if not + * already set, and make sure we get an event when + * the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1483,8 +1545,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) } /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * If DTR Toggle mode is on, turn on DTR now if not + * already set, and make sure we get an event when + * the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1494,7 +1557,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } - memcpy_toio(&ch->ch_neo_uart->txrxburst, ch->ch_wqueue + tail, s); + memcpy_toio(&ch->ch_neo_uart->txrxburst, + ch->ch_wqueue + tail, s); /* Add and flip queue if needed */ tail = (tail + s) & WQUEUEMASK; @@ -1547,7 +1611,9 @@ static void neo_parse_modem(struct channel_t *ch, unsigned char signals) } } - /* Scrub off lower bits. They signify delta's, which I don't care about */ + /* Scrub off lower bits. They signify delta's, + * which I don't care about. + */ msignals &= 0xf0; if (msignals & UART_MSR_DCD) @@ -1628,7 +1694,8 @@ static void neo_uart_init(struct channel_t *ch) /* Clear out UART and FIFO */ readb(&ch->ch_neo_uart->txrx); - writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR + | UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr); readb(&ch->ch_neo_uart->lsr); readb(&ch->ch_neo_uart->msr); @@ -1725,7 +1792,8 @@ static void neo_send_immediate_char(struct channel_t *ch, unsigned char c) neo_pci_posting_flush(ch->ch_bd); } -static unsigned int neo_read_eeprom(unsigned char __iomem *base, unsigned int address) +static unsigned int neo_read_eeprom(unsigned char __iomem *base, + unsigned int address) { unsigned int enable; unsigned int bits; @@ -1779,12 +1847,13 @@ static void neo_vpd(struct dgnc_board *brd) /* Store the VPD into our buffer */ for (i = 0; i < NEO_VPD_IMAGESIZE; i++) { a = neo_read_eeprom(brd->re_map_membase, i); - brd->vpd[i*2] = a & 0xff; - brd->vpd[(i*2)+1] = (a >> 8) & 0xff; + brd->vpd[i * 2] = a & 0xff; + brd->vpd[(i * 2) + 1] = (a >> 8) & 0xff; } if (((brd->vpd[0x08] != 0x82) /* long resource name tag */ - && (brd->vpd[0x10] != 0x82)) /* long resource name tag (PCI-66 files)*/ + && (brd->vpd[0x10] != 0x82)) + /* long resource nametag (PCI-66 files)*/ || (brd->vpd[0x7F] != 0x78)) { /* small resource end tag */ memset(brd->vpd, '\0', NEO_VPD_IMAGESIZE); diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h index c528df5..5be232f 100644 --- a/drivers/staging/dgnc/dgnc_neo.h +++ b/drivers/staging/dgnc/dgnc_neo.h @@ -30,7 +30,8 @@ struct neo_uart_struct { u8 txrx; /* WR RHR/THR - Holding Reg */ u8 ier; /* WR IER - Interrupt Enable Reg */ - u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */ + u8 isr_fcr; + /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */ u8 lcr; /* WR LCR - Line Control Reg */ u8 mcr; /* WR MCR - Modem Control Reg */ u8 lsr; /* WR LSR - Line Status Reg */ @@ -65,8 +66,8 @@ struct neo_uart_struct { #define NEO_EEDO 0x80 /* Data Out is an Input Pin */ #define NEO_EEREG 0x8E /* offset to EEPROM control reg */ - -#define NEO_VPD_IMAGESIZE 0x40 /* size of image to read from EEPROM in words */ +#define NEO_VPD_IMAGESIZE 0x40 +/* size of image to read from EEPROM in words */ #define NEO_VPD_IMAGEBYTES (NEO_VPD_IMAGESIZE * 2) /* @@ -109,7 +110,8 @@ struct neo_uart_struct { /* 17158 Extended IIR's */ #define UART_17158_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */ #define UART_17158_IIR_XONXOFF 0x10 /* Received an XON/XOFF char */ -#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20 /* CTS/DSR or RTS/DTR state change */ +#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20 +/* CTS/DSR or RTS/DTR state change */ #define UART_17158_IIR_FIFO_ENABLED 0xC0 /* 16550 FIFOs are Enabled */ /* @@ -120,8 +122,10 @@ struct neo_uart_struct { #define UART_17158_RXRDY_TIMEOUT 0x2 /* RX Ready Timeout */ #define UART_17158_TXRDY 0x3 /* TX Ready */ #define UART_17158_MSR 0x4 /* Modem State Change */ -#define UART_17158_TX_AND_FIFO_CLR 0x40 /* Transmitter Holding Reg Empty */ -#define UART_17158_RX_FIFO_DATA_ERROR 0x80 /* UART detected an RX FIFO Data error */ +#define UART_17158_TX_AND_FIFO_CLR 0x40 +/* Transmitter Holding Reg Empty */ +#define UART_17158_RX_FIFO_DATA_ERROR 0x80 +/* UART detected an RX FIFO Data error */ /* * These are the EXTENDED definitions for the 17C158's Interrupt @@ -133,8 +137,10 @@ struct neo_uart_struct { #define UART_17158_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */ #define UART_17158_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */ -#define UART_17158_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */ -#define UART_17158_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */ +#define UART_17158_XOFF_DETECT 0x1 +/* Indicates whether chip saw an incoming XOFF char */ +#define UART_17158_XON_DETECT 0x2 +/* Indicates whether chip saw an incoming XON char */ #define UART_17158_IER_RSVD1 0x10 /* Reserved by Exar */ #define UART_17158_IER_XOFF 0x20 /* Xoff Interrupt Enable */ diff --git a/drivers/staging/dgnc/dgnc_pci.h b/drivers/staging/dgnc/dgnc_pci.h index 617d40d..4e170c4 100644 --- a/drivers/staging/dgnc/dgnc_pci.h +++ b/drivers/staging/dgnc/dgnc_pci.h @@ -59,7 +59,6 @@ #define PCI_DEVICE_NEO_EXPRESS_8RJ45_PCI_NAME "Neo 8 PCI Express RJ45" #define PCI_DEVICE_NEO_EXPRESS_4_IBM_PCI_NAME "Neo 4 PCI Express IBM" - /* Size of Memory and I/O for PCI (4 K) */ #define PCI_RAM_SIZE 0x1000 diff --git a/drivers/staging/dgnc/dgnc_sysfs.c b/drivers/staging/dgnc/dgnc_sysfs.c index 74a0725..db7951f 100644 --- a/drivers/staging/dgnc/dgnc_sysfs.c +++ b/drivers/staging/dgnc/dgnc_sysfs.c @@ -193,12 +193,18 @@ static ssize_t dgnc_ports_msignals_show(struct device *p, count += snprintf(buf + count, PAGE_SIZE - count, "%d %s %s %s %s %s %s\n", bd->channels[i]->ch_portnum, - (bd->channels[i]->ch_mostat & UART_MCR_RTS) ? "RTS" : "", - (bd->channels[i]->ch_mistat & UART_MSR_CTS) ? "CTS" : "", - (bd->channels[i]->ch_mostat & UART_MCR_DTR) ? "DTR" : "", - (bd->channels[i]->ch_mistat & UART_MSR_DSR) ? "DSR" : "", - (bd->channels[i]->ch_mistat & UART_MSR_DCD) ? "DCD" : "", - (bd->channels[i]->ch_mistat & UART_MSR_RI) ? "RI" : ""); + (bd->channels[i]->ch_mostat & UART_MCR_RTS) + ? "RTS" : "", + (bd->channels[i]->ch_mistat & UART_MSR_CTS) + ? "CTS" : "", + (bd->channels[i]->ch_mostat & UART_MCR_DTR) + ? "DTR" : "", + (bd->channels[i]->ch_mistat & UART_MSR_DSR) + ? "DSR" : "", + (bd->channels[i]->ch_mistat & UART_MSR_DCD) + ? "DCD" : "", + (bd->channels[i]->ch_mistat & UART_MSR_RI) + ? "RI" : ""); } else { count += snprintf(buf + count, PAGE_SIZE - count, "%d\n", bd->channels[i]->ch_portnum); diff --git a/drivers/staging/dgnc/dgnc_tty.c b/drivers/staging/dgnc/dgnc_tty.c index 48e4b90..d07e168 100644 --- a/drivers/staging/dgnc/dgnc_tty.c +++ b/drivers/staging/dgnc/dgnc_tty.c @@ -443,15 +443,16 @@ void dgnc_tty_uninit(struct dgnc_board *brd) brd->PrintDriver.termios = NULL; } -/*======================================================================= +/*================================================================== * * dgnc_wmove - Write data to transmit queue. * * ch - Pointer to channel structure. - * buf - Poiter to characters to be moved. + * buf - Pointer to characters to be moved. * n - Number of characters to move. * - *=======================================================================*/ + *================================================================== + */ static void dgnc_wmove(struct channel_t *ch, char *buf, uint n) { int remain; @@ -489,13 +490,14 @@ static void dgnc_wmove(struct channel_t *ch, char *buf, uint n) ch->ch_w_head = head; } -/*======================================================================= +/*================================================================ * * dgnc_input - Process received data. * * ch - Pointer to channel structure. * - *=======================================================================*/ + *================================================================ + */ void dgnc_input(struct channel_t *ch) { struct dgnc_board *bd; @@ -936,7 +938,8 @@ void dgnc_wakeup_writes(struct channel_t *ch) if ((ch->ch_tun.un_tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && ch->ch_tun.un_tty->ldisc->ops->write_wakeup) { spin_unlock_irqrestore(&ch->ch_lock, flags); - ch->ch_tun.un_tty->ldisc->ops->write_wakeup(ch->ch_tun.un_tty); + ch->ch_tun.un_tty->ldisc->ops->write_wakeup + (ch->ch_tun.un_tty); spin_lock_irqsave(&ch->ch_lock, flags); } @@ -956,7 +959,8 @@ void dgnc_wakeup_writes(struct channel_t *ch) * the queue and UART is empty, keep RTS low. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { - ch->ch_mostat &= ~(UART_MCR_RTS); + ch->ch_mostat &= + ~(UART_MCR_RTS); ch->ch_bd->bd_ops->assert_modem_signals(ch); } @@ -966,7 +970,8 @@ void dgnc_wakeup_writes(struct channel_t *ch) */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { ch->ch_mostat &= ~(UART_MCR_DTR); - ch->ch_bd->bd_ops->assert_modem_signals(ch); + ch->ch_bd->bd_ops-> + assert_modem_signals(ch); } } } @@ -978,7 +983,8 @@ void dgnc_wakeup_writes(struct channel_t *ch) if ((ch->ch_pun.un_tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && ch->ch_pun.un_tty->ldisc->ops->write_wakeup) { spin_unlock_irqrestore(&ch->ch_lock, flags); - ch->ch_pun.un_tty->ldisc->ops->write_wakeup(ch->ch_pun.un_tty); + ch->ch_pun.un_tty->ldisc->ops->write_wakeup + (ch->ch_pun.un_tty); spin_lock_irqsave(&ch->ch_lock, flags); } @@ -2520,12 +2526,12 @@ static void dgnc_tty_flush_buffer(struct tty_struct *tty) /* Flush UARTs transmit FIFO */ ch->ch_bd->bd_ops->flush_uart_write(ch); - if (ch->ch_tun.un_flags & (UN_LOW|UN_EMPTY)) { - ch->ch_tun.un_flags &= ~(UN_LOW|UN_EMPTY); + if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) { + ch->ch_tun.un_flags &= ~(UN_LOW | UN_EMPTY); wake_up_interruptible(&ch->ch_tun.un_flags_wait); } - if (ch->ch_pun.un_flags & (UN_LOW|UN_EMPTY)) { - ch->ch_pun.un_flags &= ~(UN_LOW|UN_EMPTY); + if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) { + ch->ch_pun.un_flags &= ~(UN_LOW | UN_EMPTY); wake_up_interruptible(&ch->ch_pun.un_flags_wait); } @@ -2717,16 +2723,18 @@ static int dgnc_tty_ioctl(struct tty_struct *tty, unsigned int cmd, ch->ch_w_head = ch->ch_w_tail; ch->ch_bd->bd_ops->flush_uart_write(ch); - if (ch->ch_tun.un_flags & (UN_LOW|UN_EMPTY)) { + if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) { ch->ch_tun.un_flags &= - ~(UN_LOW|UN_EMPTY); - wake_up_interruptible(&ch->ch_tun.un_flags_wait); + ~(UN_LOW | UN_EMPTY); + wake_up_interruptible + (&ch->ch_tun.un_flags_wait); } - if (ch->ch_pun.un_flags & (UN_LOW|UN_EMPTY)) { + if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) { ch->ch_pun.un_flags &= - ~(UN_LOW|UN_EMPTY); - wake_up_interruptible(&ch->ch_pun.un_flags_wait); + ~(UN_LOW | UN_EMPTY); + wake_up_interruptible + (&ch->ch_pun.un_flags_wait); } } } diff --git a/drivers/staging/dgnc/digi.h b/drivers/staging/dgnc/digi.h index cf9dcae..e202aac 100644 --- a/drivers/staging/dgnc/digi.h +++ b/drivers/staging/dgnc/digi.h @@ -31,21 +31,21 @@ #endif #if !defined(TIOCMSET) -#define TIOCMSET (('d'<<8) | 252) /* set modem ctrl state */ -#define TIOCMGET (('d'<<8) | 253) /* set modem ctrl state */ +#define TIOCMSET (('d' << 8) | 252) /* set modem ctrl state */ +#define TIOCMGET (('d' << 8) | 253) /* set modem ctrl state */ #endif #if !defined(TIOCMBIC) -#define TIOCMBIC (('d'<<8) | 254) /* set modem ctrl state */ -#define TIOCMBIS (('d'<<8) | 255) /* set modem ctrl state */ +#define TIOCMBIC (('d' << 8) | 254) /* set modem ctrl state */ +#define TIOCMBIS (('d' << 8) | 255) /* set modem ctrl state */ #endif -#define DIGI_GETA (('e'<<8) | 94) /* Read params */ -#define DIGI_SETA (('e'<<8) | 95) /* Set params */ -#define DIGI_SETAW (('e'<<8) | 96) /* Drain & set params */ -#define DIGI_SETAF (('e'<<8) | 97) /* Drain, flush & set params */ -#define DIGI_GET_NI_INFO (('d'<<8) | 250) /* Non-intelligent state info */ -#define DIGI_LOOPBACK (('d'<<8) | 252) /* +#define DIGI_GETA (('e' << 8) | 94) /* Read params*/ +#define DIGI_SETA (('e' << 8) | 95) /* Set params*/ +#define DIGI_SETAW (('e' << 8) | 96) /* Drain & set params*/ +#define DIGI_SETAF (('e' << 8) | 97) /* Drain, flush & set params*/ +#define DIGI_GET_NI_INFO (('d' << 8) | 250) /* Non-intelligent state info */ +#define DIGI_LOOPBACK (('d' << 8) | 252) /* * Enable/disable UART * internal loopback */ @@ -85,7 +85,7 @@ struct digi_dinfo { char dinfo_version[16]; /* driver version */ }; -#define DIGI_GETDD (('d'<<8) | 248) /* get driver info */ +#define DIGI_GETDD (('d' << 8) | 248) /* get driver info */ /************************************************************************ * Structure used with ioctl commands for per-board information @@ -105,7 +105,7 @@ struct digi_info { char info_reserved[7]; /* for future expansion */ }; -#define DIGI_GETBD (('d'<<8) | 249) /* get board info */ +#define DIGI_GETBD (('d' << 8) | 249) /* get board info */ struct digi_getbuffer /* Struct for holding buffer use counts */ { @@ -133,10 +133,10 @@ struct digi_getcounter { #define DIGI_SETCUSTOMBAUD _IOW('e', 106, int) /* Set integer baud rate */ #define DIGI_GETCUSTOMBAUD _IOR('e', 107, int) /* Get integer baud rate */ -#define DIGI_REALPORT_GETBUFFERS (('e'<<8) | 108) -#define DIGI_REALPORT_SENDIMMEDIATE (('e'<<8) | 109) -#define DIGI_REALPORT_GETCOUNTERS (('e'<<8) | 110) -#define DIGI_REALPORT_GETEVENTS (('e'<<8) | 111) +#define DIGI_REALPORT_GETBUFFERS (('e' << 8) | 108) +#define DIGI_REALPORT_SENDIMMEDIATE (('e' << 8) | 109) +#define DIGI_REALPORT_GETCOUNTERS (('e' << 8) | 110) +#define DIGI_REALPORT_GETEVENTS (('e' << 8) | 111) #define EV_OPU 0x0001 /* !