Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933592AbbLQV13 (ORCPT ); Thu, 17 Dec 2015 16:27:29 -0500 Received: from mail.savoirfairelinux.com ([208.88.110.44]:33353 "EHLO mail.savoirfairelinux.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932402AbbLQV11 (ORCPT ); Thu, 17 Dec 2015 16:27:27 -0500 From: Damien Riegel To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Shawn Guo , Sascha Hauer , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , kernel@savoirfairelinux.com, Damien Riegel Subject: [PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations Date: Thu, 17 Dec 2015 16:16:52 -0500 Message-Id: <1450387013-3532-1-git-send-email-damien.riegel@savoirfairelinux.com> X-Mailer: git-send-email 2.5.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1097 Lines: 38 These pins are actually not routed for UARTs, they should not be reserved. Signed-off-by: Damien Riegel --- arch/arm/boot/dts/imx51-ts4800.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts index f1317f7..64ac55c 100644 --- a/arch/arm/boot/dts/imx51-ts4800.dts +++ b/arch/arm/boot/dts/imx51-ts4800.dts @@ -157,8 +157,6 @@ fsl,pins = < MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 - MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 - MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 >; }; @@ -173,8 +171,6 @@ fsl,pins = < MX51_PAD_EIM_D25__UART3_RXD 0x1c5 MX51_PAD_EIM_D26__UART3_TXD 0x1c5 - MX51_PAD_EIM_D27__UART3_RTS 0x1c5 - MX51_PAD_EIM_D24__UART3_CTS 0x1c5 >; }; }; -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/