Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753224AbbLRHS2 (ORCPT ); Fri, 18 Dec 2015 02:18:28 -0500 Received: from mail-bl2on0089.outbound.protection.outlook.com ([65.55.169.89]:34400 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752176AbbLRHS0 (ORCPT ); Fri, 18 Dec 2015 02:18:26 -0500 From: "Yu, Xiangliang" To: Allen Hubbe CC: "jdmason@kudzu.us" , "dave.jiang@intel.com" , "linux-ntb@googlegroups.com" , "linux-kernel@vger.kernel.org" , SPG_Linux_Kernel Subject: RE: [PATCH 1/3] NTB: Add AMD PCI-Express NTB driver Thread-Topic: [PATCH 1/3] NTB: Add AMD PCI-Express NTB driver Thread-Index: AQHROHm1wOqCW2NzMUWtpNAMMJQ0JJ7PY8KAgADujWA= Date: Fri, 18 Dec 2015 07:18:23 +0000 Message-ID: References: <1450340265-18912-1-git-send-email-Xiangliang.Yu@amd.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Xiangliang.Yu@amd.com; x-originating-ip: [210.13.97.168] x-microsoft-exchange-diagnostics: 1;BLUPR12MB0420;5:tgcyvEI2mEjvJiopbdXuzDL75QQDeUnNP5qPFs47GR/bEKeLsq/yoIGVZnnBJQxHiQViybdKvRqyx5c2BsYI0EPlI07OOgxKMPIcxrOwIoxjD+5OQggpf03UVQZsdHTC+hzlS2C676NsIesf/81GXg==;24:sB0Tkm8dqTCXuQu1M1Pk7SRu/oO/Lx9UqxDFWacYI1DWo1lDSoxPX6NI0ZJjPA+RI04c2OcUeB52FcpswZ25PsFsw3MkdsKmotaK6Fyh7CM=;20:tglXpJ4cMKrzP2TbKToZRcs0DP/PMDKsBKJDTHv1Cry6Bz9gLttmlnw6mYr3b2bqaW+iz2h44AdnRSW26Qz0eYIuzgkqG8B0bKmSv8MzBVMj8Te4US29yJU1hkcm0BaXpiJzuphG4YPDHHBHUTGhArV7846blYLqeyc7LahfjqHiAlAVXwcqex3+wexJfLHOPQ5INso96vtVYcbMCCsSlC757MR+kor5OIUV/9GrLDOewzOTHh1RREbh2T/gF7il x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR12MB0420; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(767451399110); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(520078)(8121501046)(5005006)(3002001)(10201501046);SRVR:BLUPR12MB0420;BCL:0;PCL:0;RULEID:;SRVR:BLUPR12MB0420; x-forefront-prvs: 07943272E1 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(189002)(377454003)(24454002)(199003)(1096002)(19580395003)(1411001)(586003)(5004730100002)(6116002)(1220700001)(5008740100001)(3846002)(86362001)(11100500001)(102836003)(10400500002)(105586002)(76176999)(106356001)(106116001)(54356999)(5001960100002)(40100003)(74316001)(50986999)(5003600100002)(92566002)(2950100001)(2900100001)(110136002)(99286002)(189998001)(87936001)(97736004)(76576001)(122556002)(66066001)(81156007)(77096005)(5002640100001)(33656002)(101416001)(19580405001);DIR:OUT;SFP:1101;SCL:1;SRVR:BLUPR12MB0420;H:BLUPR12MB0420.namprd12.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;MX:1;A:1;LANG:en; Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2015 07:18:23.1008 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR12MB0420 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id tBI7IXl7021878 Content-Length: 5599 Lines: 183 > From: Allen Hubbe [mailto:allenbh@gmail.com] > Sent: Friday, December 18, 2015 12:46 AM > To: Yu, Xiangliang > Cc: jdmason@kudzu.us; dave.jiang@intel.com; linux-ntb@googlegroups.com; > linux-kernel@vger.kernel.org; SPG_Linux_Kernel > Subject: Re: [PATCH 1/3] NTB: Add AMD PCI-Express NTB driver > > On Thu, Dec 17, 2015 at 3:17 AM, Xiangliang Yu > wrote: > > AMD NTB support following main features: > > (1) Three memory windows; > > (2) Sixteen 32-bit scratch pad; > > (3) Two 16-bit doorbell interrupt; > > (4) Five event interrupts; > > (5) One system can wake up opposite system of NTB; > > (6) Flush previous request to the opposite system; > > (7) There are reset and PME_TO mechanisms between two systems; > > > > Signed-off-by: Xiangliang Yu > > Is hardware available on which this can be tested? No yet. Right now, verified the driver on emulator. > > > +++ b/drivers/ntb/hw/amd/ntb_hw_amd.c > > > +static u64 amd_ntb_db_read(struct ntb_dev *ntb) { > > + struct amd_ntb_dev *ndev = ntb_ndev(ntb); > > + > > + return (u64)NTB_READ_REG(DBSTAT); } > > DBSTAT hides the use of ndev, or ndev is unused. The code should be more > clear, here, and in other places where NTB_READ_REG and NTB_WRITE_REG > are used with a macro argument. Got it, I will add ndev into macro arguments. > > > +static void amd_ack_SMU(struct amd_ntb_dev *ndev, u32 bit) { > > + int reg; > > + > > + reg = NTB_READ_REG(SMUACK); > > + reg |= bit; > > + NTB_WRITE_REG(reg, SMUACK); > > + > > + ndev->peer_sta |= bit; > > +} > > + > > +/* > > + * flush the requests to peer side > > + */ > > +static int amd_flush_peer_requests(struct amd_ntb_dev *ndev) { > > + u32 reg; > > + > > + if (!amd_link_is_up(ndev)) { > > + dev_err(ndev_dev(ndev), "link is down.\n"); > > + return -EINVAL; > > + } > > + > > Add reinit_completion, or this may already be "complete" from a previous > flush. Ok. > > > + reg = NTB_READ_REG(FLUSHTRIG); > > + reg |= 0x1; > > + NTB_WRITE_REG(reg, FLUSHTRIG); > > + > > + wait_for_completion(&ndev->flush_cmpl); > > Because of wait_for_completion, that this can only be called in a thread > context. This is unlike other functions of ntb.h, so there should at least be a > note in the api documentation. Ok. > > > + > > + return 0; > > +} > > + > > +/* > > + * wake up the peer side > > + */ > > +static int amd_wakeup_peer_side(struct amd_ntb_dev *ndev) { > > + u32 reg; > > + > > + if (!amd_link_is_up(ndev)) { > > + dev_warn(ndev_dev(ndev), "link is down.\n"); > > + return -EINVAL; > > + } > > + > > See previous comment. > > > + NTB_READ_REG(PMSGTRIG); > > + reg |= 0x1; > > + NTB_WRITE_REG(reg, PMSGTRIG); > > + > > + wait_for_completion(&ndev->wakeup_cmpl); > > + > > + return 0; > > +} > > > > +static void amd_handle_event(struct amd_ntb_dev *ndev, int vec) { > > + u32 status; > > + > > + status = NTB_READ_REG(INTSTAT); > > + if (!(status & AMD_EVENT_INTMASK)) > > + return; > > + > > + dev_dbg(ndev_dev(ndev), "status = 0x%x and vec = %d\n", > > + status, vec); > > + > > + status &= AMD_EVENT_INTMASK; > > + switch (status) { > > + case AMD_PEER_FLUSH_EVENT: > > + complete(&ndev->flush_cmpl); > > + break; > > + case AMD_PEER_RESET_EVENT: > > + amd_ack_SMU(ndev, AMD_PEER_RESET_EVENT); > > + > > + /* link down first */ > > + ntb_link_event(&ndev->ntb); > > + /* polling peer status */ > > + schedule_delayed_work(&ndev->hb_timer, > > + AMD_LINK_HB_TIMEOUT); > > + > > + break; > > + case AMD_PEER_D3_EVENT: > > + case AMD_PEER_PMETO_EVENT: > > + amd_ack_SMU(ndev, status); > > + > > + /* link down */ > > + ntb_link_event(&ndev->ntb); > > + > > + break; > > + case AMD_PEER_D0_EVENT: > > + status = NTB_READ_PEER_REG(PMESTAT); > > + /* check if this is WAKEUP event */ > > + if (status & 0x1) > > + complete(&ndev->wakeup_cmpl); > > + > > + amd_ack_SMU(ndev, AMD_PEER_D0_EVENT); > > + > > + if (amd_link_is_up(ndev)) > > + ntb_link_event(&ndev->ntb); > > + else > > + schedule_delayed_work(&ndev->hb_timer, > > + AMD_LINK_HB_TIMEOUT); > > + break; > > + default: > > + pr_err("Unsupported interrupt.\n"); > > + break; > > + } > > +} > > + > > +static irqreturn_t ndev_interrupt(struct amd_ntb_dev *ndev, int vec) > > +{ > > + dev_dbg(ndev_dev(ndev), "vec %d\n", vec); > > + > > + if (vec > 20) { > > This duplicates the "default" case of amd_handle_event. Ok, I'll refine the code. > > > + dev_err(ndev_dev(ndev), "Invalid interrupt.\n"); > > + return IRQ_HANDLED; > > + } > > + > > + if (vec > 16 || (ndev->msix_vec_count == 1)) > > + amd_handle_event(ndev, vec); > > + > > + if (vec < 16) > > + ntb_db_event(&ndev->ntb, vec); > > + > > + return IRQ_HANDLED; > > +} ????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m???? ????????I?