Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934562AbbLRI6K (ORCPT ); Fri, 18 Dec 2015 03:58:10 -0500 Received: from foss.arm.com ([217.140.101.70]:38384 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932952AbbLRI6G (ORCPT ); Fri, 18 Dec 2015 03:58:06 -0500 Message-ID: <5673CA9A.8030607@arm.com> Date: Fri, 18 Dec 2015 08:58:02 +0000 From: Marc Zyngier Organization: ARM Ltd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.7.0 MIME-Version: 1.0 To: Daniel Thompson , Russell King CC: Thomas Gleixner , Jason Cooper , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: Re: [PATCH 1/2] arm: Fix "NMI" backtrace for Inforce IFC6410 References: <1450285686-844-1-git-send-email-daniel.thompson@linaro.org> <1450285686-844-2-git-send-email-daniel.thompson@linaro.org> In-Reply-To: <1450285686-844-2-git-send-email-daniel.thompson@linaro.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2153 Lines: 59 On 16/12/15 17:08, Daniel Thompson wrote: > SysRq-L does not generate a backtrace from all CPUs when I test it > on my Inforce IFC6410 platform (Snapdragon 600). The stack dump code, > triggered by IPI_CPU_BACKTRACE, never runs on the other CPUs. > Eventually we hit the 10 second timeout and a subset of the expected > stack dumps on are shown on the console. > > It is likely this is because SGI IDs 14 and 15 have been reserved for > use by secure world on this platform. For IFC6410 platform the code > works as expected when IPI_CPU_BACKTRACE is set to any value in the > interval 9..13. > > Signed-off-by: Daniel Thompson > --- > arch/arm/kernel/smp.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c > index b26361355dae..78205927fcd4 100644 > --- a/arch/arm/kernel/smp.c > +++ b/arch/arm/kernel/smp.c > @@ -73,7 +73,8 @@ enum ipi_msg_type { > IPI_CPU_STOP, > IPI_IRQ_WORK, > IPI_COMPLETION, > - IPI_CPU_BACKTRACE = 15, > + IPI_CPU_BACKTRACE = 13, > + /* 14 and 15 are reserved; they do not work on some Krait CPUs */ > }; > > static DECLARE_COMPLETION(cpu_running); > It looks to me that we're just moving the goal posts and keep using a SGI that is likely to be reserved by the secure side. Quoting the GIC spec: In any system that implements the ARM Security Extensions, to support a consistent model for message passing between processors, ARM strongly recommends that all processors reserve: * ID0-ID7 for Non-secure interrupts * ID8-ID15 for Secure interrupts. Of course, this is only a recommendation, but it is one that is likely to be followed... Now, we are already using our 8 "non-secure" SGIs, but we can immediately reclaim one (IPI_CALL_FUNC_SINGLE is not that useful anymore). I'll cook a patch for that. Thanks, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/