Date: Fri, 18 Dec 2015 10:58:38 +0000
From: Mark Rutland <mark.rutland@arm.com>
To: "majun (F)" <majun258@huawei.com>, marc.zyngier@arm.com
Cc: Catalin.Marinas@arm.com, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, Will.Deacon@arm.com,
        jason@lakedaemon.net, tglx@linutronix.de, lizefan@huawei.com,
        huxinwei@huawei.com, dingtianhong@huawei.com, zhaojunhua@hisilicon.com,
        liguozhu@hisilicon.com, xuwei5@hisilicon.com,
        wei.chenwei@hisilicon.com, guohanjun@huawei.com, wuyun.wu@huawei.com,
        guodong.xu@linaro.org, haojian.zhuang@linaro.org,
        zhangfei.gao@linaro.org, usman.ahmad@linaro.org,
        klimov.linux@gmail.com, gabriele.paoloni@huawei.com
Subject: Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings
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On Fri, Dec 18, 2015 at 09:58:20AM +0800, majun (F) wrote:
> Hi Mark:
> 
> 在 2015/12/17 21:52, Mark Rutland 写道:
> > On Thu, Dec 17, 2015 at 07:56:34PM +0800, MaJun wrote:
> >> From: Ma Jun <majun258@huawei.com>
> [...]
> >> +- compatible: Should be "hisilicon,mbigen-v2"
> >> +
> >> +- reg: Specifies the base physical address and size of the Mbigen
> >> +  registers.
> >> +
> >> +- interrupt controller: Identifies the node as an interrupt controller
> >> +
> >> +- msi-parent: Specifies the MSI controller this mbigen use.
> >> +  For more detail information,please refer to the generic msi-parent binding in
> >> +  Documentation/devicetree/bindings/interrupt-controller/msi.txt.
> >> +
> >> +- num-msis:Specifies the total number of interrupt this device has.
> > 
> > Is this the number of pins implemented? Or the number of pins that are
> > in use?
> > 
> > The latter feels like something we can derive.
> 
> num-msis means the total number of pins implemented.

Ok. In that case I think it should be:

- num-pins: the total number of pins implemented in this Mbigen
  instance.

(with the appropriate fixups in the driver).

With that:

Acked-by: Mark Rutland <mark.rutland@arm.com>

> >> +- #interrupt-cells : Specifies the number of cells needed to encode an
> >> +  interrupt source. The value must be 2.
> >> +
> >> +  The 1st cell is hardware pin number of the interrupt.This number is local to
> >> +  each mbigen chip and in the range from 0 to the maximum interrupts number
> >> +  of the mbigen.
> > 
> > Just to check: 0 - 63 represent the "reserved" pins, yes?
> 
> Yes, you are right.
> 
> > 
> > Other than those questions, this looks good to me.
> 
> Do i need to post a new patch to update these two questions?

Hopefully not.

Marc, are you happy to fold in the s/num-msis/num-pins/ change?

Thanks,
Mark.
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