Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753057AbbLRRqY (ORCPT ); Fri, 18 Dec 2015 12:46:24 -0500 Received: from foss.arm.com ([217.140.101.70]:42082 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751674AbbLRRqX (ORCPT ); Fri, 18 Dec 2015 12:46:23 -0500 Date: Fri, 18 Dec 2015 17:46:08 +0000 From: Mark Rutland To: "Suzuki K. Poulose" Cc: Yury Norov , Catalin.Marinas@arm.com, klimov.linux@gmail.com, ddaney.cavm@gmail.com, ard.biesheuvel@linaro.org, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4] arm64: run-time detection for aarch32 support Message-ID: <20151218174607.GE30229@leverpostej> References: <1450454429-22976-1-git-send-email-ynorov@caviumnetworks.com> <56743C4F.7060201@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <56743C4F.7060201@arm.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2314 Lines: 59 On Fri, Dec 18, 2015 at 05:03:11PM +0000, Suzuki K. Poulose wrote: > On 18/12/15 16:00, Yury Norov wrote: > >Kernel option COMPAT defines the ability of executing aarch32 binaries. > >Some platforms does not support aarch32 mode, and so cannot execute that > >binaries. But we cannot just disable COMPAT for them because the same > >kernel binary may be used by multiple platforms. > > > >diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > >index 8f271b8..781a2f7 100644 > >--- a/arch/arm64/include/asm/cpufeature.h > >+++ b/arch/arm64/include/asm/cpufeature.h > >@@ -184,6 +184,13 @@ static inline bool system_supports_mixed_endian_el0(void) > > return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1)); > > } > > > >+static inline bool system_supports_aarch32_el0(void) > >+{ > >+ u64 pfr0 = read_system_reg(SYS_ID_AA64PFR0_EL1); > >+ return ((pfr0 >> ID_AA64PFR0_EL0_SHIFT) & ID_AA64PFR0_ELx_MASK) > >+ != ID_AA64PFR0_EL0_64BIT_ONLY; > > Could you please use > > cpuid_feature_extract_field(pfr0, ID_AA64PFR0_EL0_SHIFT) != ID_AA64PFR0_EL0_64BIT_ONLY > > instead and > > >--- a/arch/arm64/include/asm/sysreg.h > >+++ b/arch/arm64/include/asm/sysreg.h > >@@ -102,6 +102,7 @@ > > #define ID_AA64PFR0_EL2_SHIFT 8 > > #define ID_AA64PFR0_EL1_SHIFT 4 > > #define ID_AA64PFR0_EL0_SHIFT 0 > >+#define ID_AA64PFR0_ELx_MASK 0xf > > get rid of ^ ? > > As per ARM ARM, AArch32 only ID register values are unknown if AArch32 is > not implemented. So I think we need to skip accessing the AArch32 ID registers > everywhere (feature tracking), if the CPU doesn't supports it, to avoid > unnecessary SANITY failures and TAINTing the kernel. That all sounds good to me. After boot-time we should also fail hotplug of a CPU that doesn't support AArch32, if we decided at boot-time that AArch32 was supported accross the system. That should probably be added to your early cpu feature verification [1]. Thanks, Mark. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-December/392237.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/