Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751476AbbLUORT (ORCPT ); Mon, 21 Dec 2015 09:17:19 -0500 Received: from mout.kundenserver.de ([212.227.126.187]:61949 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751123AbbLUORQ (ORCPT ); Mon, 21 Dec 2015 09:17:16 -0500 From: Arnd Bergmann To: Tomasz Nowicki Subject: Re: [PATCH V2 00/23] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI Date: Mon, 21 Dec 2015 15:15:54 +0100 User-Agent: KMail/1.12.2 (Linux/3.19.0-27-generic; KDE/4.3.2; x86_64; ; ) Cc: Lorenzo Pieralisi , okaya@codeaurora.org, bhelgaas@google.com, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, jiang.liu@linux.intel.com, stefano.stabellini@eu.citrix.com, robert.richter@caviumnetworks.com, mw@semihalf.com, liviu.dudau@arm.com, ddaney@caviumnetworks.com, tglx@linutronix.de, wangyijing@huawei.com, suravee.suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, jchandra@broadcom.com, jcm@redhat.com References: <1450278993-12664-1-git-send-email-tn@semihalf.com> <20151221121050.GB11145@red-moon> <5677F3C8.8040200@semihalf.com> In-Reply-To: <5677F3C8.8040200@semihalf.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Message-Id: <201512211515.55447.arnd@arndb.de> X-Provags-ID: V03:K0:u+QZ6qrvkCyeb6yrSInvsB5mAUFnxzGuagcDsz6YEvXx/NF57bM D0RkWnEjezo9S7SM7gfH52mTrgjfgL7XAzxMMkmU5g5FdxyKFBkNwNc7S1kXIEJsJjoQp95 biVNV0LCc0LkRyZ5xUOTLrv1fRiqaANR0J8fhgxOSODJuU6JAhLuyZWktsLJK1wu/UKBBrl gVt8L30nMYgW81ZkEJ9uQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:c7z1Tzb62iY=:9nljDqO5CrUwi8/3Uqk+MZ yUqvDmn2htrciXYTob8qwgDIdVfJ0T35JXjcIGChQViw4meRfG2ZdteZ8TgnO+FZYN8+FBMMo 53jC6mcKZCaLXOmh0KAOiKLXeE74OS6PyMDDgx5pYU64CICdMgIsX4GtfWJY2wU/cpoANgUfP 068R0I8fPBUSiizh4xtGY46JGUXRVpuTIK1p9ZM33RcEGLW7+bjY/W5d9m/wpEKYLdFa7LKMB lbiK7DaVZTb3QEljJehKDpphTKZRKDZGRRT3ZCQ2qfpxHRC9DG5qD9XtnxIQi2FusZyedIWmh Z2P6SWpGEz3dnHPaYchyx4jxPwpE6M9XrCed39ts+GLZ4QhhNGy1qaVGlheetxXSFAAU3ZmOk dqzkwXXlE0XoGUMSXzScrfCMJBYg8h8YfHZlwM299KPa6ba+hG4UaGAnBGOhTDS1TY3RcRxaq 2kurEZWyNQRiFP4hYOBVO/pgr5mE29toBa+Rky0pQ1AJJG8s7tKuoculbU2v/LpV3ifjglIv2 lwxyM1fKPFM3oWqb25oGE8UA5gUfwW/LM/Hgpu886P/8gVaqio5twLTiBoKqpYiHMh2lub6WE akylGlq92PnGDX+TqCHGWF5HpLVjz0ZRx89JZHppGv3M4jZ9RmOi+d9RP4WAD2zEQsd1ANv3j Gfno/3upP516daT5B1WE0NzuWVbYSI4XIvAYceQRmkwzjBLKwlAoc6SsfJm2l9qtA1vT/ZPkK 5KZQ0R0gq7nSW/LE Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1973 Lines: 44 On Monday 21 December 2015, Tomasz Nowicki wrote: > On 21.12.2015 13:10, Lorenzo Pieralisi wrote: > > On Fri, Dec 18, 2015 at 06:56:39PM +0000, okaya@codeaurora.org wrote: > >> I have multiple root ports with the same IO port configuration in the > >> current ACPI table. > >> > >> Root port 0 = IO range 0x1000-0x10FFF > >> Root port 1 = IO range 0x1000-0x10FFF > >> Root port 2 = IO range 0x1000-0x10FFF > > > > It is fine. You end up mapping for each of those a 4k window of the > > virtual address space allocated to IO and that's what you will have in > > the kernel PCI resources (not in the HW BARs though). If that was a problem > > it would be even for the current DT host controllers eg: > > > > arch/arm64/boot/dts/apm/apm-storm.dtsi > > > > it should not be (again I will let Arnd comment on this since he may be > > aware of issues encountered on other arches/platforms). > > > > Root port 0 = IO range 0x1000-0x10FFF > Root port 1 = IO range 0x1000-0x10FFF > Root port 2 = IO range 0x1000-0x10FFF > > If above ranges are mapped into different CPU windows, then yes, it is fine. Ideally, they should all be the same CPU address so we only have to map the window once, each device gets an address below 64K, and you can have legacy port numbers (below 4K) on any bus, which is required to make certain GPUs work. I haven't actually seen anyone do that on ARM though, every implementation so far has a separate mapping per host bridge, and we can cope with that too, and we can live with either overlapping bus addresses or unique bus addresses, any of them can be expressed by the PCI core in Linux, we just have to make sure that we correctly translate the firmware tables into our internal structures. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/