Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751460AbbLUQi0 (ORCPT ); Mon, 21 Dec 2015 11:38:26 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:19921 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751208AbbLUQiY (ORCPT ); Mon, 21 Dec 2015 11:38:24 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 21 Dec 2015 08:23:22 -0800 Subject: Re: [PATCH 2/2] clk: tegra: Use definition for pll_u override bit To: Jon Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Stephen Warren , Thierry Reding , Alexandre Courbot References: <1450702592-7755-1-git-send-email-jonathanh@nvidia.com> <1450702592-7755-2-git-send-email-jonathanh@nvidia.com> CC: , , From: Rhyland Klein Message-ID: <56782AFD.80004@nvidia.com> Date: Mon, 21 Dec 2015 11:38:21 -0500 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <1450702592-7755-2-git-send-email-jonathanh@nvidia.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1391 Lines: 35 On 12/21/2015 7:56 AM, Jon Hunter wrote: > The definition, PLLU_BASE_OVERRIDE, for the pll_u OVERRIDE bit is defined > but not used and when the OVERRIDE bit is cleared in tegra210_pll_init() > the code directly uses the bit number. Therefore, use the definition, > PLLU_BASE_OVERRIDE when clearing the OVERRIDE bit. > > Signed-off-by: Jon Hunter > --- > drivers/clk/tegra/clk-tegra210.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c > index 791215747863..6f043c5e2394 100644 > --- a/drivers/clk/tegra/clk-tegra210.c > +++ b/drivers/clk/tegra/clk-tegra210.c > @@ -2520,7 +2520,7 @@ static void __init tegra210_pll_init(void __iomem *clk_base, > > /* PLLU_VCO */ > val = readl(clk_base + pll_u_vco_params.base_reg); > - val &= ~BIT(24); /* disable PLLU_OVERRIDE */ > + val &= ~PLLU_BASE_OVERRIDE; /* disable PLLU_OVERRIDE */ > writel(val, clk_base + pll_u_vco_params.base_reg); > > clk = tegra_clk_register_pllre("pll_u_vco", "pll_ref", clk_base, pmc, > Acked-by: Rhyland Klein -- nvpublic -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/