Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934143AbbLWK2j (ORCPT ); Wed, 23 Dec 2015 05:28:39 -0500 Received: from mail-bl2nam02on0071.outbound.protection.outlook.com ([104.47.38.71]:22848 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S934123AbbLWK2h (ORCPT ); Wed, 23 Dec 2015 05:28:37 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Ranjit Waghmode To: , , , , , , , , CC: , , , , , Ranjit Waghmode Subject: [RFC LINUX PATCH] dt: xilinx: xadc: provision to control clock frequency Date: Wed, 23 Dec 2015 15:58:25 +0530 Message-ID: <1450866505-22069-1-git-send-email-ranjit.waghmode@xilinx.com> X-Mailer: git-send-email 2.1.2 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22018.006 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(36386004)(1220700001)(19580395003)(5001960100002)(6806005)(4001430100002)(107886002)(36756003)(92566002)(103686003)(19580405001)(5008740100001)(50466002)(47776003)(189998001)(86362001)(106466001)(5001770100001)(63266004)(1096002)(81156007)(50986999)(50226001)(90966002)(586003)(11100500001)(87936001)(5003940100001)(48376002)(42186005)(2201001)(52956003)(45336002)(33646002)(46386002)(229853001)(107986001)(5001870100001)(217873001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT029;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;PTR:xapps1.xilinx.com,unknown-60-100.xilinx.com;A:1;MX:1;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501001);SRVR:SN1NAM02HT029; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(520078)(5005006)(8121501046)(10201501046)(3002001);SRVR:SN1NAM02HT029;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT029; X-Forefront-PRVS: 0799B1B2D7 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Dec 2015 10:28:34.0519 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT029 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1952 Lines: 57 This patch adds parameter to the xilinx-xadc node for controlling clock frequency. Following are the possible options for user to control the frequency: * 00 : 1/2 of clock frequency * 01 : 1/4 of clock frequency * 10 : 1/8 of clock frequency * 11 : 1/16 of clock frequency So this patch adds parameter tck-rate to set user defined values from above pool to control the clock frequency. Signed-off-by: Ranjit Waghmode --- Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt index d71258e..2cabb9b 100644 --- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt @@ -20,6 +20,11 @@ Required properties: - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock, when using the AXI-XADC pcore this must be the clock that provides the clock to the AXI bus interface of the core. + - tck-rate: clock frequency control + * 0x0: 1/2 of clock frequency + * 0x1: 1/4 of clock frequency + * 0x2: 1/8 of clock frequency + * 0x3: 1/16 of clock frequency Optional properties: - interrupt-parent: phandle to the parent interrupt controller @@ -79,6 +84,7 @@ Examples: interrupts = <0 7 4>; interrupt-parent = <&gic>; clocks = <&pcap_clk>; + tck-rate = <0x3>; xlnx,channels { #address-cells = <1>; @@ -101,6 +107,7 @@ Examples: interrupts = <0 53 4>; interrupt-parent = <&gic>; clocks = <&fpga1_clk>; + tck-rate = <0x3>; xlnx,channels { #address-cells = <1>; -- 2.1.2 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/