Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756991AbbLWMx1 (ORCPT ); Wed, 23 Dec 2015 07:53:27 -0500 Received: from lucky1.263xmail.com ([211.157.147.132]:59333 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756963AbbLWMxR (ORCPT ); Wed, 23 Dec 2015 07:53:17 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: ykk@rock-chips.com X-FST-TO: inki.dae@samsung.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Yakir Yang To: Inki Dae , Mark Yao , Jingoo Han , Heiko Stuebner Cc: Thierry Reding , Krzysztof Kozlowski , Rob Herring , Russell King , emil.l.velikov@gmail.com, Gustavo Padovan , Kishon Vijay Abraham I , javier@osg.samsung.com, Andy Yan , Yakir Yang , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag Date: Wed, 23 Dec 2015 20:51:04 +0800 Message-Id: <1450875064-19627-1-git-send-email-ykk@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450873538-18304-1-git-send-email-ykk@rock-chips.com> References: <1450873538-18304-1-git-send-email-ykk@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2532 Lines: 72 On Rockchip platform, sometimes driver would failed at reading EDID message, and it's caused by the AUX reply flag wouldn't received under the 100*10us wait time. But after expand the wait time a little, the AUX reply flag would be set, so maybe the wait time is a little critical. Besides the analogix dp book haven't reminded the standard wait for looking AUX reply flag, so I thought it's okay to expand the wait time. And the external wait time won't hurt Exynos DP too much, cause they wouldn't meet this problem, then driver would received the reply command very soon, so no more additional wait time would bring to Exynos platform. Signed-off-by: Yakir Yang --- Changes in v12: - Using another way to expand the AUX reply wait time (Jingoo) Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index cba3ffd..8687eea 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -471,7 +471,7 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp) { int reg; int retval = 0; - int timeout_loop = 0; + unsigned long timeout; /* Enable AUX CH operation */ reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); @@ -479,14 +479,12 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp) writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); /* Is AUX CH command reply received? */ - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); - while (!(reg & RPLY_RECEIV)) { - timeout_loop++; - if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { + timeout = jiffies + msecs_to_jiffies(5); + while ((readl(dp->reg_base + ANALOGIX_DP_INT_STA) & RPLY_RECEIV) == 0) { + if (time_after(jiffies, timeout)) { dev_err(dp->dev, "AUX CH command reply failed!\n"); return -ETIMEDOUT; } - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); usleep_range(10, 11); } -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/