Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754519AbbL0VVF (ORCPT ); Sun, 27 Dec 2015 16:21:05 -0500 Received: from down.free-electrons.com ([37.187.137.238]:56922 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753423AbbL0VVC (ORCPT ); Sun, 27 Dec 2015 16:21:02 -0500 Date: Sun, 27 Dec 2015 22:20:59 +0100 From: Maxime Ripard To: Vishnu Patekar Cc: "robh+dt@kernel.org" , Jonathan Corbet , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , Kumar Gala , "linux@arm.linux.org.uk" , Emilio Lopez , Linus Walleij , Jens Kuske , Hans de Goede , Chen-Yu Tsai , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-sunxi@googlegroups.com" , linux-gpio@vger.kernel.org Subject: Re: [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi Message-ID: <20151227212059.GN30359@lukather> References: <1450445451-311-1-git-send-email-vishnupatekar0510@gmail.com> <1450445451-311-3-git-send-email-vishnupatekar0510@gmail.com> <20151218214112.GU30359@lukather> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="cU9XODsizZBnwgll" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2694 Lines: 74 --cU9XODsizZBnwgll Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Dec 22, 2015 at 05:41:22PM +0800, Vishnu Patekar wrote: > >> + clocks { > >> + #address-cells =3D <1>; > >> + #size-cells =3D <1>; > >> + ranges; > >> + > >> + osc24M: osc24M_clk { > >> + #clock-cells =3D <0>; > >> + compatible =3D "fixed-clock"; > >> + clock-frequency =3D <24000000>; > >> + clock-output-names =3D "osc24M"; > >> + }; > >> + > >> + osc32k: osc32k_clk { > >> + #clock-cells =3D <0>; > >> + compatible =3D "fixed-clock"; > >> + clock-frequency =3D <32768>; > >> + clock-output-names =3D "osc32k"; > >> + }; > > > > Do you need to modify the clocks driver in your first commit then? > I did not get what you are trying to say here, could you please elaborate? >=20 > I'll correct mistakes, and re-send this patch, is it okie? In your first patch, you add a CLK_OF_DECLARE for the H3 compatible in clk-sunxi.c Judging from your clocks node above, you don't need it at all. I'm guessing you'll need it later on, but I wanted to know if that was intentional :) Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --cU9XODsizZBnwgll Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWgFY7AAoJEBx+YmzsjxAgGAcQAKPzhzLVmt/qOh6OtuBYO1uq Bf2MnmWSXnHeidNl/HHiy7ZBQu1TsLRBiPowJn4cDjfhBGjelXhfkjDPRY1aI44i UMqHi0OgitDoGm0bvfIRWF8yxsyJWzx/I1v5lTigQ0vRXlIFt1laINnLlqCdOa0R 1x464MmcPLf2XgETpYlIrdQDnBMtOOGmoHQZuNt3GLzbBYsj3WnNjgSh7Cs6VtAR RZN+AiD/SXvIbhZB0OurNwJhMCtta/tYaGRaahUsKlChnawdYHapEXz6nmB47x6S 4vazbqbxb8V67vZAiIE7i7GNbskE1JZhHah2xctAoi4kGE0+W1Dmv+8+PwW29+yF J/6O/X3+iUXbebQsaDuQESo2IDQ5wcwL5qEWJz9yewVv2S3zu12Bj35noo1iF+Th 5QgFepMZV6WrGv3JGfUV3FhmbojNPJP1lbqsLibakXjoF2Ut2+eQ2dFEL9yTidhh K/wCP0wwRkFCPhf0DCcZCTeqsiMxvVB4YruJRPYbmDIRZtpgyybSGmBHbKZJ5gZP qd/AdWbVgaVtgAJcnZlhuVshEnb4JMi9bs+9/VJbh16Re0wtw7xgTWjM+o7vmGB1 sfVTyumOZ3ZSb8+zLdiUhGvoEiRuos5/seMtXSKwvXcXCgXwJHGpnmRzEGyjhpy3 59BxS+RFm8RlJbuOEfGc =fx2L -----END PGP SIGNATURE----- --cU9XODsizZBnwgll-- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/