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Date: Tue, 1 Mar 2016 08:55:39 +0000 (UTC)
From: Paul Walmsley <paul@pwsan.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
cc: Tony Lindgren <tony@atomide.com>, robh+dt@kernel.org,
        Tero Kristo <t-kristo@ti.com>, linux-omap@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/11] ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0,
 tptc1
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On Thu, 25 Feb 2016, Peter Ujfalusi wrote:

> Add hwmod data for the eDMA blocks:
>  - TPCC: Third-party channel controller
>  - TPTC0: Third-party transfer controller 0
>  - TPTC1: Third-party transfer controller 1
> 
> The TPCC is following it's clock and power domain. This means that
> the hwmod can not control it's status.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

Thanks, queued.


- Paul